关于GCLK的问题

110500623

在map中出现如下错误：根据提示好像说时钟管脚没有在专用管脚上引起的，可我把时钟约束到专用的GCLK上还是会出现如下错误，不想按照它提示的方法修改，怕影响时序分析，有什么方法吗，期待高手解答
ERRORlace:1115 - Unroutable Placement! A clock IOB / BUFIO clock component
   pair have been found that are not placed at a routable clock IOB / BUFIO site
   pair. The clock IOB component <clkp> is placed at site <AD25>. The BUFIO
   component <SP6_BUFIO_INSERT_ML_BUFIO2_85> is placed at site <BUFIO2_X4Y20>.
   Each BUFIO site has a select set of IOBs that can drive it. If these IOBs are
   not used, the connection is not routable You may want to analyze why this
   problem exists and correct it. This placement is UNROUTABLE in PAR and
   therefore, this error condition should be fixed in your design. You may use
   the CLOCK_DEDICATED_ROUTE constraint in the .ucf file to demote this message
   to a WARNING in order to generate an NCD file. This NCD file can then be used
   in FPGA Editor to debug the problem. A list of all the COMP.PINS used in this
   clock placement rule is listed below. These examples can be used directly in
   the .ucf file to demote this ERROR to a WARNING.
   < NET "clkp" CLOCK_DEDICATED_ROUTE = FALSE; >
   < PIN "SP6_BUFIO_INSERT_ML_BUFIO2_85.I" CLOCK_DEDICATED_ROUTE = FALSE; >

falloutmx

你时钟进来后，是不是自己又例化了一个IBUF给它？就是这个SP6_BUFIO_INSERT_ML_BUFIO2_85

110500623

是的，我输入是差分时钟，用了一个IBUFGDS转成单端的

falloutmx

Each BUFIO site has a select set of IOBs that can drive it
主要就是这个。你在AD25管脚附近找个BUFIO，然后把你的IBUFGDS约束到那里应该就OK了。

wag

gaoji!