上海要一个验证的,公司不错(绝对不会倒得那种,国内上市希望非常大的那种)
1.Minimum 4 year experience in the hands-on IC verification with coverage driven testing methodology.
2.Be familiar with System Verilog. Familiarity of Synopsys VMM or Cadence Plan-to-Closure Methodology.
3.Be familiar with ARM process and AHB, AXI protocol.
4.Knowledgeable in ASIC design methodology