A must read hardware verification book

rprince006

Book:  Hardware Design Verification: Simulation and Formal Method-Based Approaches
Author: William K. Lam

Paperback: 624 pages
Publisher: Prentice Hall PTR; 1 edition (November 22, 2008)
Language: English (in chm format)

Book reviews:
As digital logic designs grow larger and more complex, functional verification has become the number one bottleneck in the design process. Reducing verification time is crucial to project success, yet many practicing engineers have had little formal training in verification, and little exposure to the newest solutions. Hardware Design Verification systematically presents today's most valuable simulation-based and formal verification techniques, helping test and design engineers choose the best approach for each project, quickly gain confidence in their designs, and move into fabrication far more rapidly. College students will find that coverage of verification principles and common industry practices will help them prepare for jobs as future verification engineers.

Author William K. Lam, one of the world's leading experts in design verification, is a recent winner of the Chairman's Award for Innovation, Sun Microsystems' most prestigious technical achievement award. Drawing on his wide-ranging experience, he introduces the foundational principles of verification, presents traditional techniques that have survived the test of time, and introduces emerging techniques for today's most challenging designs. Throughout, Lam emphasizes practical examples rather than mathematical proofs; wherever advanced math is essential, he explains it clearly and accessibly.

Coverage includes

• Simulation-based versus formal verification: advantages, disadvantages, and tradeoffs

• Coding for verification: functional and timing correctness, syntactical and structure checks, simulation performance, and more

• Simulator architectures and operations, including event-driven, cycle-based, hybrid, and hardware-based simulators

• Testbench organization, design, and tools: creating a fast, efficient test environment

• Test scenarios and assertion: planning, test cases, test generators, commercial and Verilog assertions, and more

• Ensuring complete coverage, including code, parameters, functions, items, and cross-coverage

• The verification cycle: failure capture, scope reduction, bug tracking, simulation data dumping, isolation of underlying causes, revision control, regression, release mechanisms, and tape-out criteria

• An accessible introduction to the mathematics and algorithms of formal verification, from Boolean functions to state-machine equivalence and graph algorithms

• Decision diagrams, equivalence checking, and symbolic simulation

• Model checking and symbolic computation

Simply put, Hardware Design Verification will help you improve and accelerate your entire verification process--from planning through tape-out--so you can get to market faster with higher quality designs.

To find the book at Amazon:
http://www.amazon.com/Hardware-Design-Verification-Simulation-Method-Based/dp/0137010923/ref=sr_1_1?ie=UTF8&s=books&qid=1258480224&sr=8-1

rprince006

Personally I believe this book is one of best books so far on functional verification, it covers
simulation-based methods and formal methods, semi-formal methods. The book is best for
graduate students who are interested in functional verification, and for junior verification engineers.

A1985

kankan.....

jery_cn

As for you recommend.Get and keep it.

apteye

xiexie

Jerry_Yang

thank you very much ...

iseesky

good!thanks!

cuiandhang

3ku ！！！that is what i need

vineeth

thanks a lot............

vineeth

good work..........