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[IC经典图书系列]《Navabi_verilog_digital_systems_design.pdf》-part1

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发表于 2006-7-10 21:07:14 | 显示全部楼层 |阅读模式

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《verilog_digital_systems_design 》

by Zainalabedin Navabi

Northeastern University
University of Tehran

Copyright © 1999 by The McGraw-Hill Companies, Inc. All rights reserved. Manufactured in the United States of America. Except as permitted under the United States Copyright Act of 1976, no part of this publication may be reproduced or distributed in any form or by any means, or stored in a database or retrieval system, without the prior written permission of the publisher.

               
                007-137304-7               
               
       
The material in this eBook also appears in the print version of this title: 0-07-047164-9


All trademarks are trademarks of their respective owners. Rather than put a trademark symbol after every occurrence of a trademarked name, we use names in an editorial fashion only, and to the benefit of the trademark owner, with no intention of infringement of the trademark. Where such designations appear in this book, they have been printed with initial caps.


McGraw-Hill eBooks are available at special quantity discounts to use as premiums and sales promotions, or for use in corporate training programs. For more information, please contact George Hoare, Special Sales, at george_hoare@mcgraw-hill.com or (212) 904-4069.

JavaScript support is required on the netLibrary site. Table of Contents
§         
Verilog Digital System Design
§         
Contents
§         
Preface
§         
Overview of the Chapters
§         
Suggested Reading Flow
§         
Code Examples
§         
Acknowledgments
§         
Chapter 1— Hardware Design Environments
§         
Chapter 2— Verilog HDL Background
§         
Chapter 3— Design Methodology Based on Verilog
§         
Chapter 4— Basic Concepts in Verilog
§         
Chapter 5— Structural Specification of Hardware
§         
Chapter 6— Design Organization and Parametrization
§         
Chapter 7— Utilities for High-Level Descriptions
§         
Chapter 8— Dataflow Descriptions in Verilog
§         
Chapter 9— Behavioral Description of Hardware
§         
Chapter 10— CPU Modeling for Discrete Design
§         
Chapter 11— Interface Design and Modeling
§         
Appendix A— Frequently Used System Tasks and Functions
§         
Appendix B— Compiler Directives
§         
Appendix C— Verilog HDL Syntax
§         
Appendix D— Parwan Verilog Descriptions
§         
Appendix E— Verilog Synthesis Examples
§         
Appendix F— Software Accompanying This Book
§         
Index
§         
About the Author

[ 本帖最后由 vertyang 于 2006-7-10 21:14 编辑 ]

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Navabi_verilog_digital_systems_design_navabi.part01.rar

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part1

发表于 2007-1-16 16:10:01 | 显示全部楼层

回复 #1 vertyang 的帖子

就这一个吗?
发表于 2007-2-8 00:00:05 | 显示全部楼层

上当了

这个资料就第一部分,根本不能解压缩啊
发表于 2007-2-16 15:21:27 | 显示全部楼层
上当啊
论坛内只能找到
前面9部分
发表于 2007-3-25 21:55:54 | 显示全部楼层
楼主不是弄的假资料,不敢给全吧。这样赚信元可不仗义。
发表于 2007-4-25 21:58:02 | 显示全部楼层
非常感谢啊请!!!!!!!!!!!!!!!!!!
发表于 2007-5-12 21:26:55 | 显示全部楼层
非常感谢,下来看看
发表于 2007-5-15 10:56:20 | 显示全部楼层
多谢楼主/
发表于 2007-5-15 12:01:32 | 显示全部楼层
其他部分呢??
 楼主| 发表于 2007-5-24 21:23:28 | 显示全部楼层
请大家到此帖子下载,见谅!
http://www.eetop.cn/bbs/thread-58287-1-1.html
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