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《verilog_digital_systems_design 》
by Zainalabedin Navabi
Northeastern University
University of Tehran
Copyright © 1999 by The McGraw-Hill Companies, Inc. All rights reserved. Manufactured in the United States of America. Except as permitted under the United States Copyright Act of 1976, no part of this publication may be reproduced or distributed in any form or by any means, or stored in a database or retrieval system, without the prior written permission of the publisher.
007-137304-7
The material in this eBook also appears in the print version of this title: 0-07-047164-9
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JavaScript support is required on the netLibrary site. Table of Contents
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Verilog Digital System Design
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Contents
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Preface
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Overview of the Chapters
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Suggested Reading Flow
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Code Examples
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Acknowledgments
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Chapter 1— Hardware Design Environments
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Chapter 2— Verilog HDL Background
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Chapter 3— Design Methodology Based on Verilog
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Chapter 4— Basic Concepts in Verilog
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Chapter 5— Structural Specification of Hardware
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Chapter 6— Design Organization and Parametrization
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Chapter 7— Utilities for High-Level Descriptions
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Chapter 8— Dataflow Descriptions in Verilog
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Chapter 9— Behavioral Description of Hardware
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Chapter 10— CPU Modeling for Discrete Design
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Chapter 11— Interface Design and Modeling
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Appendix A— Frequently Used System Tasks and Functions
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Appendix B— Compiler Directives
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Appendix C— Verilog HDL Syntax
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Appendix D— Parwan Verilog Descriptions
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Appendix E— Verilog Synthesis Examples
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Appendix F— Software Accompanying This Book
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Index
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About the Author
[ 本帖最后由 vertyang 于 2006-7-10 21:14 编辑 ] |
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