How to deal with the internal clock during DFT

Ada86831

Hi, all,
  There is an internal clock generated by the system clock. When I inserted scan chain, all the flip-flops driven by the internal clock weren't in the scan chain. It said the CK of these FF are uncontrolled. I set mixing_clock mix_clocks.
   How can i fix those problems?

   Thank you so much.

acmawy

我是来顶的

creese

如果RTL未freeze，修改RTL，增加mux, 用test_mode作为选择信号在test模式下将外部clk用作dft clk,在功能模式下将分频时钟用作clk; 如果代码freeze，用autofix在门级来解决这个问题。我是做dft的，有什么问题可以给我邮件一起讨论：haidongli22@yahoo.com.cn

harry1862pd

thank you very much

camfence

学习了

he013119

來學習看看

bingling512

回复 3# creese


    请问用的是哪个工具？