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An Embedded Test Circuit for RF Single Ended Low Noise Amplifiers
L. Dermentzoglou, A. Karagounis, A. Arapoyanni
Dept. of Informatics and Telecommunications
University of Athens
Panepistimioupolis, 15784 Athens, Greece
e-mail: {dermetz, tasoska, [email=arapoyanni}@di.uoa.gr]arapoyanni}@di.uoa.gr[/email]
Y. Tsiatouhas
Department of Computer Science
University of Ioannna
P.O. Box 1186, 45110, Ioannina, Greece
e-mail: tsiatouhas@cs.uoi.gr
Abstract—This paper presents a cost effective Embedded Test
Circuit (ETC) for single ended Low Noise Amplifiers (LNAs).
The ETC operation is based on the observation that the
presence of catastrophic faults, like resistive bridgings, shorts
and opens, or parametric faults, result in the attenuation of the
output voltage amplitude (gain reduction). The ETC along
with a single ended LNA have been designed in a 0.35μm
CMOS technology to evaluate the efficiency of the proposed
approach and experimental results are presented. |
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发表于 2009-10-1 08:55:52
