Noise Optimization of an Inductively Degenerated CMOS low noise amplifier.pdf

qitianhua

Noise Optimization of an Inductively Degenerated
CMOS Low Noise Amplifier
Pietro Andreani, Member, IEEE and Henrik Sjöland, Member, IEEE
Abstract—This paper presents a technique for substantially reducing
the noise of a CMOS low noise amplifier implemented in
the inductive source degeneration topology. The effects of the gate
induced current noise on the noise performance are taken into account,
and the total output noise is strongly reduced by inserting
a capacitance of appropriate value in parallel with the amplifying
MOS transistor of the LNA. As a result, very low noise figures become
possible already at very low power consumption levels.
Index Terms—CMOS, gate-induced current noise, LNA, noise,
RF.

nero007

:lol

fwutsairlin

thanks!

ralphtwtw

Noise Optimization of an Inductively Degenerated CMOS low noise amplifier