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发表于 2009-8-13 12:46:18
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Abstract—Leakage power is becoming the dominant component
of chip power consumption with continued CMOS scaling. An
important but commonly unnoticed fact is that leaky transistors
act as resistors that help dampen the mid-frequency power supply
noise. This paper focuses on the damping effect of various on-chip
current components including the leakage current which becomes
significant in scaled technologies. By developing physics-based
damping models for active and leakage currents, we show that
leakage, particularly gate tunneling leakage, provides more
damping than strong-inversion current. The proposed models
were validated in a 32-nm predictive CMOS technology under
process–voltage–temperature (PVT) variations. Examples on
large circuits such as SRAM caches are shown to illustrate the
application of the proposed model. Simulation results show that
the leakage induced damping effect can compensate the speed
degradation at high temperatures by 7% or offer 61% saving in
decap area and leakage power. |
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