THREE-DIMENSIONAL DIE-STACKING INTEGRATION STACKS MULTIPLE LAYERS OF
PROCESSED SILICON WITH A VERY HIGH-DENSITY, LOW-LATENCY LAYER-TO-LAYER
INTERCONNECT. AFTER PRESENTING A BRIEF BACKGROUND ON 3D DIE-STACKING
TECHNOLOGY, THIS ARTICLE GIVES MULTIPLE CASE STUDIES ON DIFFERENT APPROACHES
FOR IMPLEMENTING SINGLE-CORE AND MULTICORE 3D PROCESSORS AND DISCUSSES
HOW TO DESIGN FUTURE MICROPROCESSORS GIVEN THIS EMERGING TECHNOLOGY. IEEE-Micro-2007.pdf(1.95 MB, 下载次数: 62 )
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发表于 2009-6-9 15:28:32
