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VHDL has been at the heart of electronic design productivity since ini-
tial ratification by the IEEE in 1987. For almost 15 years the electronic
design automation industry has expanded the use of VHDL from initial
concept of design documentation, to design implementation and func-
tional verification. It can be said that VHDL fueled modern synthesis
technology and enabled the development of ASIC semiconductor compa-
nies. The editions of Doug Perry’s books have served as the authoritative
source of practical information on the use of VHDL for users of the
language around the world.
The use of VHDL has evolved and its importance increased as semi-
conductor devices dimensions have shrunk. Not more than 10 years ago it
was common to mix designs described with schematics and VHDL. But as
design complexity grew, the industry abandoned schematics in favor of the
hardware description language only. The successive revisions of this book
have always kept pace with the industry’s evolving use of VHDL.
The fact that VHDL is adaptable is a tribute to its architecture. The
industry has seen the use of VHDL’s package structure to allow design-
ers, electronic design automation companies and the semiconductor indus-
try to experiment with new language concepts to ensure good design tool
and data interoperability. When the associated data types found in the
IEEE 1164 standard were ratified, it meant that design data interoper-
ability was possible.
All of this was facilitated by industry backing in a consortium of systems,
electronic design automation and semiconductor companies now known
as Accellera.
And when the ASIC industry needed a standard way to convey gate-
level design data and timing information in VHDL, one of Accellera’s
progenitors (VHDL International) sponsored the IEEE VHDL team to
build a companion standard. The IEEE 1076.4 VITAL (VHDL Initiative
Towards ASIC Libraries) was created and ratified as offers designers a
single language flow from concept to gate-level signoff.
In the late ’90s, the Verilog HDL and VHDL industry standards teams
collaborated on the use of a common timing data such as IEEE 1497 SDF,
set register transfer level (RTL) standards and more to improve design
methodologies and the external connections provided to the hardware
description languages.
But from the beginning, the leadership of the VHDL community has
assured open and internationally accredited standards for the electronic
design engineering community. The legacy of this team’s work continues
to benefit the design community today as the benchmark by which one
measures openness.
The design community continues to see benefits as the electronic design
automation community continues to find new algorithms to work from
VHDL design descriptions and related standards to again push designer
productivity. And, as a new generation of designers of programmable logic
devices move to the use of hardware description languages as the basis of
their design methodology, there will be substantial growth in the number
of VHDL users.
This new generation of electronic designers, along with the current
designers of complex systems and ASICs, will find this book as invalu-
able as the first generation of VHDL users did with the first addition.
Updated with current use of the standard, all will benefit from the years
of use that have made the VHDL language the underpinning of successful
electronic design.VHDL has been at the heart of electronic design productivity since ini-
tial ratification by the IEEE in 1987. For almost 15 years the electronic
design automation industry has expanded the use of VHDL from initial
concept of design documentation, to design implementation and func-
tional verification. It can be said that VHDL fueled modern synthesis
technology and enabled the development of ASIC semiconductor compa-
nies. The editions of Doug Perry’s books have served as the authoritative
source of practical information on the use of VHDL for users of the
language around the world.
The use of VHDL has evolved and its importance increased as semi-
conductor devices dimensions have shrunk. Not more than 10 years ago it
was common to mix designs described with schematics and VHDL. But as
design complexity grew, the industry abandoned schematics in favor of the
hardware description language only. The successive revisions of this book
have always kept pace with the industry’s evolving use of VHDL.
The fact that VHDL is adaptable is a tribute to its architecture. The
industry has seen the use of VHDL’s package structure to allow design-
ers, electronic design automation companies and the semiconductor indus-
try to experiment with new language concepts to ensure good design tool
and data interoperability. When the associated data types found in the
IEEE 1164 standard were ratified, it meant that design data interoper-
ability was possible.
All of this was facilitated by industry backing in a consortium of systems,
electronic design automation and semiconductor companies now known
as Accellera.
And when the ASIC industry needed a standard way to convey gate-
level design data and timing information in VHDL, one of Accellera’s
progenitors (VHDL International) sponsored the IEEE VHDL team to
build a companion standard. The IEEE 1076.4 VITAL (VHDL Initiative
Towards ASIC Libraries) was created and ratified as offers designers a
single language flow from concept to gate-level signoff.
In the late ’90s, the Verilog HDL and VHDL industry standards teams
collaborated on the use of a common timing data such as IEEE 1497 SDF,
set register transfer level (RTL) standards and more to improve design |
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