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SystemVerilog for Verification
A Guide to Learning the Testbench Language Features-Second Edition
Library of Congress Control Number: 2008920031
ISBN 978-0-387-76529-7 e-ISBN 978-0-387-76530-3
This book is the first one you should read to learn the SystemVerilog verification
language constructs. It describes how the language works and includes many exam-
ples on how to build a basic coverage-driven, constrained-random layered testbench
using Object-Oriented Programming (OOP). The book has many guidelines on build-
ing testbenches, which help show why you want to use classes, randomization, and
functional coverage. Once you have learned the language, pick up some of the meth-
odology books listed in the References section for more information on building a
testbench. |
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发表于 2009-5-1 08:17:01
