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我用tsmc13rf PDK (v1.2 ?)做的PLL,在ncelab过程中遇到了如下问题(见log):电路中的nmos1v, pmos1v都能过,但是rfnmos1v, rfpmos1v都过不了,我对比发现rf器件缺少ams view,而其他能过的器件都有ams view。我尝试了一下用symbol editor为rf器件创建名为ams的view(因为库中自有的ams view 和symbol view看起来内容一样),但是问题仍没有解决,log报告的错误是一样的。
诚请指点一下如何解决这个问题?(我现在暂无权限去下载最新的PDK,所以只好想其他办法解决)
非常感谢!!!
ncelab: 05.81-p002: (c) Copyright 1995-2006 Cadence Design Systems, Inc.
TOOL: ncelab 05.81-p002: Started on Apr 20, 2009 at 21:32:57 CST
ncelab
-cds_implicit_tmpdir /home/vikinglan/pll_tsmc013/simulation/PLLtop_tb/ams/config/netlist/ihnl
-propsPath /home/vikinglan/pll_tsmc013/myPLLThesis/PLLtop_tb/config/prop.cfg
-timescale 1ns/1ns
-discipline logic
-delay_mode None
-novitalaccl
-access +r
-errorMax 50
-messages
-status
-nowarn DLNOHV
-cdslib /home/vikinglan/pll_tsmc013/cds.lib
-noparamerr
-use5x4vhdl
-update
-amspartinfo /home/vikinglan/pll_tsmc013/simulation/PLLtop_tb/ams/config/psf/partition.info
-modelpath /eda/techlib/tsmc13rf/models/tsmc13rf.scs
-work myPLLThesis
myPLLThesis.PLLtop_tb:config
connectLib.ConnRules_12V_full_fast:connect
myPLLThesis.cds_globalsLLtop_tb_config
-logfile /home/vikinglan/pll_tsmc013/simulation/PLLtop_tb/ams/config/psf/ncelab.log
Elaborating the design hierarchy:
ncelab: *W,CUNOUN: Cannot find any unit under tsmc13rf.rfpmos1v:symbol in the design libraries.
ncelab: *E,CUCFUN: instance 'M5' of the unit 'rfpmos1v' is unresolved in 'myPLLThesis.VCO_16bands:schematic'.
ncelab: *W,CUNOUN: Cannot find any unit under tsmc13rf.rfpmos1v:symbol in the design libraries.
ncelab: *E,CUCFUN: instance 'M4' of the unit 'rfpmos1v' is unresolved in 'myPLLThesis.VCO_16bands:schematic'.
ncelab: *W,CUNOUN: Cannot find any unit under tsmc13rf.rfnmos1v:symbol in the design libraries.
ncelab: *E,CUCFUN: instance 'M1' of the unit 'rfnmos1v' is unresolved in 'myPLLThesis.VCO_16bands:schematic'.
ncelab: *W,CUNOUN: Cannot find any unit under tsmc13rf.rfnmos1v:symbol in the design libraries.
ncelab: *E,CUCFUN: instance 'M0' of the unit 'rfnmos1v' is unresolved in 'myPLLThesis.VCO_16bands:schematic'.
ncelab: Memory Usage - 14.4M program + 75.8M data = 90.3M total
ncelab: CPU Usage - 0.1s system + 1.1s user = 1.2s total (1.2s, 100.0% cpu)
TOOL: ncelab 05.81-p002: Exiting on Apr 20, 2009 at 21:32:58 CST (total: 00:00:01)
ps:因为PLL中有两个数字模块,而我现有的tsmc13logic库又没有ASIC cell的电路级netlist文件,所以没办法只好做混合信号仿真。唉~~郁闷!
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