1. During sampling period, assume VCMI1(nT-T/2), VCMI2(nT-T/2), VCMO(nT-T/2) are input common mode voltage, summing node common voltage and output common voltage respecitively.
2. During amplifying period, assume VCMI1(nT), VCMI2(nT), VCMO(nT) are input common mode voltage, summing node common voltage and output common voltage respecitively.
3. As long as
VCMI1(nT) = VCMI1(nT-T/2)
VCMO(nT) = VCMO(nT-T/2)
are meet, then VCMI2(nT) = VCMI2(nT-T/2) will be satisfied(charge conversation). That is to say, the common mode voltage will be the same during the whole cycle(sampling and amplifying).
Hopefully it helps. |