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Table of contents
Introduction to Low Power
Low Power Today
Power Management
Complete Low-Power RTL-to-GDSII Flow Using CPF
A Holistic Approach to Low-Power Intent
Verification of Low-Power Intent with CPF
Power Intent Validation
Low-Power Verification
CPF Verification Summary
Front-End Design with CPF
Architectural Exploration
Synthesis Low-Power Optimization
Automated Power Reduction in Synthesis
CPF-Powered Reduction in Synthesis
Simulation for Power Estimation
CPF Synthesis Summary
Power-Aware Design for Test (DFT)
Power Domain-Aware DFT
Power-Aware Test
CPF Test Summary
Low-Power Implementation with CPF
Introduction to Low-Power Implementation
Gate-Level Optimization in Power-Aware Physical Synthesis
Clock Gating in Power-Aware Physical Synthesis
Multi-Vth Optimization in Power-Aware Physical Synthesis
Multiple Supply Voltage (MSV) in Power-Aware Physical Synthesis
Power Shut-Off (PSO) in Power-Aware Physical Synthesis
Dynamic Voltage/Frequency Scaling (DVFS) Implementation
Substrate Biasing Implementation
Diffusion Biasing
CPF Implementation Summary
References and Bibliography
Low-Power Links
Power Forward Initiative
Cadence Low-Power Links
CPF Terminology Glossary
Design Objects
CPF Objects
Special Library Cells for Power Management
ARC Energy PRO: Technology for Active Power Management
Overview of ARC Energy PRO
The Power Struggle
Designing Low-Power Solutions
Project Subsystem: ARC CPU with Co-Processor
NEC Electronics: Integrating Power Awareness in SoC Design with CPF
NEC Electronics and CPF
Why Low Power?
Comprehensive Approach to Low Power
Example of Mobile Phone System SoC
NEC Electronics CPF Proof-Point Project: NEC-PPP
... (略）
[ 本帖最后由 iskory 于 2009-3-19 22:51 编辑 ] |
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发表于 2009-3-19 22:41:42
