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Intellectual Property Protection in VLSI Designs: Theory and Practiceprovides an overview of the security problems in modern VLSI designwith a detailed treatment of our newly developed constraint-basedprotection paradigm for the protection of VLSI design IPs from FPGAdesign to standard-cell placement, from high-level synthesis solutionsto gate-level netlist place-and-rout, and from advanced CAD tools tophysical design algorithms. The problem of VLSI design IP protection ismuch more challenging than the protection of multimedia contents orsoftware, and our protection paradigm is also conceptually differentfrom the state-of-the-art approaches in those domains. The keyidea in this newly developed IP protection paradigm is to superimposeadditional constraints that correspond to an encrypted signature of thedesigner to design/software in such a way that quality of design isonly nominally impacted, while strong proof of authorship isguaranteed. It consists of three integrated parts: constraint-basedwatermarking, fingerprinting, and copy detection. Its correctnessrelies on the presence of all these components. In short, watermarkingaims to embed signatures for the identification of the IP owner withoutaltering the IP's functionality; fingerprinting seeks to provideeffective ways to distinguish each individual IP users to protect legalIP buyers; copy detection is the method to trace improper use of the IPand demonstrate IP's ownership. |
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