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发表于 2008-12-12 09:46:56
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显示全部楼层
资料比较老,99年的,看目录
Outline I
Introduction to Programmable Logic Device
CPLD and FPGA Hardware Architectures
Foundation and XACTstep Software
Foundation Schematic Flow
Library Types
Foundation Schematic Design
• Lab 1, Lab 2,
Foundation HDL Editor & State Editor
• Lab 3, Lab 4
Combinational Logic Design
Synchronous Logic Design
Outline II
Input / Output Design
Memory Design
• Lab 5, Lab 6
Foundation Simulation
• Lab 7
Simulation Script
• Lab 8
Design Implementation
M1 Implementation Options
• Lab 9
Timing Analyzer
• Lab 10
Outline III
Design Constraints
Constraints Editor
• Lab11, Lab 12
Floorplanning
Configuration
Hardware Debugger and XChecker Cable |
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