求书《High Speed A/D Converters：Understanding Data Converters Through SPICE》

ssdd_yy · 发表于 2008-11-23 14:55:23

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【原书作者】：Alfi Moscovici
【译者】：
【ISBN 】： 7923-7276􀀐X
【页数】：230
【开本】：16
【出版社】：KLUWER ACADEMIC PUBLISHERS
【出版日期】：2002
【文件格式】：pdf
【封面附图】：
【摘要或目录】：
A/D TERMINOLOGY
1.1 THE STATIC PARAMETERS
1.1.1
1.1.2
1.1.3
1.1.4
Offset error
Gain error
Integral Linearity Error (ILE)
Differential Linearity Error (DLE)
1.2 THE DYNAMIC PARAMETERS
1.2.1
1.2.2
1.2.3
1.2.4
1.2.5
1.2.6
1.2.7
1.2.8
1.2.9
Total Harmonic Distortion (THD)
Signal-to-Noise Ratio (SNR)
Signal-to-Noise and Distortion Ratio (SINAD)
Spurious-Free Dynamic Range (SFDR)
Aperture uncertainty
Frequency aliasing
Linearity effects on A/D behavior
Effects of A/D resolution on SFDR
Rectangular window – an example
1.3 THE FFT ANALYSIS
THE COMPARATOR
1.1
1.2
1.3
1.4
1.5
A COMPARATOR MACRO-MODEL
COMPARATOR DELAY RELATIVE TO INPUT OVERDRIVE
PROPAGATION DELAY RELATIVE TO SLEW RATE
PULSE REPRODUCTION FIDELITY
A CMOS COMPARATOR MODEL
FLASH A/D
1.1
1.2
1.3
1.4
A PRACTICAL 3-BIT A/D
A 6-BIT A/D
ILE / DLE ERROR EFFECTS ON SINAD
DELAY BETWEEN ANALOG-INPUT AND CLOCK
1.4.1 Column delays in 6-b A/D – example
1.5 SLEW RATE LIMITATION
1.5.1 6-b A/D with non-symmetric slew limited comparator
TRACK AND HOLD AMPLIFIER
1.1
1.2
THA – THE SPICE MODEL
ERRORS AFFECTING THA ACCURACY
1.2.1
1.2.2
1.2.3
1.2.4
1.2.5
Holding capacitor voltage-coefficient
Switch resistance modulation
Hold mode feedthrough
Sampling instance distortion
Hold command jitter
SAR A/D
1.1 PHYSICAL LIMITATIONS IN A SAR A/D
1.1.1 A/D Static errors
1.1.2 A/D Dynamic errors
1.1.3 Loop speed
1.1.4 Dynamic A/D performance
1.2 TIME INTERLEAVED CONVERTERS
1.2.1 Offset error
1.2.2 Gain error
1.2.3 Sampling instant error
FOLDING A/D CONVERTERS
1.1 THE ANALOG PREPROCESSOR
1.2 FOLDING PREPROCESSOR UNIT – AN EXAMPLE
1.3 THE LINEAR INTERPOLATOR
1.4 FOLDING 8-BIT A/D – AN EXAMPLE
1.4.1 Folding A/D converter dynamic performance
1.4.2 Folding A/D static errors and dynamic behavior
PIPELINED A/D CONVERTER
1.1 COMPONENT ACCURACY REQUIREMENTS
2.1 ERRORS IN A PRACTICAL PIPELINED A/D
2.2 ERRORS CORRECTION – AN EXAMPLE
2.3 RESIDUE D/A ERROR
SERIAL PIPELINE A/D WITH 1.5-BIT / STAGE
1.1 AN 8-BIT SERIAL PIPELINED A/D - EXAMPLE
1.1.1 Capacitance mismatch in the MDAC
1.1.2 Errors due to input coupling into the MDAC ref.
1.1.3 Errors due to input coupling into the comparator ref.
Bibliography
Index

在中国通信网：http://bbs.cnttr.com/thread-178783-1-1.html上看到有人共享，但是因为流量限制无法下载，不知道论坛里有人有这本书没有能不能共享一下，非常感谢！！！！！