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!!要发就发绝的,你不用再费心去找其它的verilog-a资料了!!

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发表于 2008-11-21 23:52:13 | 显示全部楼层 |阅读模式

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论坛里的verilog-a比较散,我汇总了一下,加上其他路径的资料,差不多你能上网找到的verilog-a资料全在这了。

什么是verilog-a?

The Verilog-A Hardware Description Language (HDL) language is used as a behavioral language for analog systems. Verilog-A HDL is derived from the
IEEE 1364 Verilog HDL specification.

The intent of Verilog-A HDL is to let designers of analog systems and integrated circuits
create and use modules that encapsulate high-level behavioral descriptions as well as
structural descriptions of systems and components. The behavior of each module can be
described mathematically in terms of its terminals and external parameters applied to the
module. The structure of each component can be described in terms of interconnected
sub-components. These descriptions can be used in many disciplines such as electrical,
mechanical, fluid dynamics, and thermodynamic

[ 本帖最后由 xenolidar 于 2008-11-25 10:55 编辑 ]
 楼主| 发表于 2008-11-21 23:57:57 | 显示全部楼层

The Designer's Guide to Verilog-AMS

The Designer’s Guide to Verilog-AMS

Ken Kundert / Olaf Zinke, ?The Designer's Guide to Verilog-AMS (The Designer's Guide Book Series)?
Kluwer Academic Publishers | ISBN 1402080441 | first edition (May 2004) | 270 pages| PDF |  6.6 Mb


The Designer's Guide to Verilog-AMS presents Verilog-AMS, the new analog and mixed-signal extensions to the widely used Verilog hardware description language.
It starts by describing a rigorous and proven top-down design methodology. Top-down design is widely seen as the key to being able to design very large and complex mixed-signal circuits and it is enabled by Verilog-AMS. Verilog-A and Verilog-AMS are then introduced without assuming that the reader has a background in behavioral modeling. Finally, it includes a comprehensive reference guide for the language.
The Designer's Guide to Verilog-AMS is extensively cross-referenced and indexed, making it an ideal reference for both Verilog-A and Verilog-AMS. A companion website, www.designers-guide.com, provides electronic copies of all the models used in this book, a library of user-contributed models, a discussion forum, additional documents on simulation and modeling, and other useful material.
The Designer's Guide to Verilog-AMS is written for analog and mixed-signal designers, particularly those designing larger and more complex circuits.
abbr_6bedf311417d93b9e462b9c2dd5d531e.jpg
book1.GIF

The Designer’s Guide to Verilog-AMS.part1.rar

4.77 MB, 下载次数: 3908 , 下载积分: 资产 -3 信元, 下载支出 3 信元

The Designer’s Guide to Verilog-AMS.part2.rar

1.87 MB, 下载次数: 3424 , 下载积分: 资产 -2 信元, 下载支出 2 信元

 楼主| 发表于 2008-11-22 00:06:26 | 显示全部楼层

Analog Behavioral Modeling with the Verilog-A language

Analog Behavioral Modeling with the Verilog-A language

Authors
Dan FitzPatrick
Ira Miller

PublisherKluwer Academic Publishers  Norwell, MA, USA



ABSTRACT
From the Publisher:
Analog Behavioral Modeling with the Verilog-A Language provides the IC designer with a comprehensive introduction to the methodologies and uses of analog behavioral modeling using the Verilog-A language. An overview of Verilog-A language constructs as well as applications using the language are presented. Analog Behavior Modeling with the Verilog-A Language is accompanied by the Verilog-A Explorer IDE (Integrated Development Environment), a limited capability Verilog-A enhanced spice simulator.


[ 本帖最后由 xenolidar 于 2008-11-22 00:58 编辑 ]
book2.GIF

Analog_Behavioral_Modeling_with_Verilog-A.part1.rar

4.77 MB, 下载次数: 3783 , 下载积分: 资产 -3 信元, 下载支出 3 信元

Analog_Behavioral_Modeling_with_Verilog-A.part2.rar

2.68 MB, 下载次数: 4145 , 下载积分: 资产 -2 信元, 下载支出 2 信元

 楼主| 发表于 2008-11-22 00:14:11 | 显示全部楼层

cic_Analog hardware description language verilog-a training manual

台湾晶片系统设计中心资料
cic.GIF

CIC_Analog hardware description language verilog-a training manual.rar

2.1 MB, 下载次数: 4862 , 下载积分: 资产 -2 信元, 下载支出 2 信元

 楼主| 发表于 2008-11-22 00:33:18 | 显示全部楼层

The Designer's Guide to Analog & Mixed-Signal Modeling

The Designer's Guide to Analog & Mixed-Signal Modeling Ilustrated with VHDL-AMS and MAST

Product Description
Illustrated with VHDL-AMS and MAST, this applications-oriented book explores modeling with mixed-signal hardware description languages. Included are: detailed examples of how differential-algebraic equation simulators work; practical overviews of the VHDL-AMS and MAST modeling; beginning through advanced modeling topics; and robust model development and convergence tips. There are more than 50 complete model listings for each language, covering S- and Z-domains; electrical, mechanical, and hydraulic domains; and mixed-signal and mixed-technology.

About the Author
R. Scott Cooper has been developing simulation models for over a decade, first as a design engineer in the aerospace industry, and later as an employee of Avant! Corporation, creators of the VeriasHDL and Saber simulators. Scott has been a modeling trainer and course developer for the past five years.
synopsys.GIF

abbr_f1ea5ae8ee1e80361488ce2e81625c4e.rar

1.7 MB, 下载次数: 2297 , 下载积分: 资产 -2 信元, 下载支出 2 信元

 楼主| 发表于 2008-11-22 00:42:22 | 显示全部楼层

verilog-a

Creating Analog Behavioral Models_VERILOG-AMS ANALOG MODELING

HOW TO (AND HOW NOT TO) WRITE A COMPACT MODEL IN VERILOG-A

Mixed Compact and Behavior Modeling Using AHDL Verilog-A

on analog behavioral modeling for sigma-delta DAC with non-ideal effect
cadence.GIF
howto.GIF
mixed.GIF
guoli.GIF

verilog-a1.rar

1.98 MB, 下载次数: 3000 , 下载积分: 资产 -2 信元, 下载支出 2 信元

 楼主| 发表于 2008-11-22 00:44:51 | 显示全部楼层

verilog-a

using HSPICE with Verilog-A

Using Verilog-A in Advanced Design System

Verilog-A-manuab Language Reference Manuall
hspice.GIF
agilent.GIF
manual.GIF

verilog-a2.rar

524.38 KB, 下载次数: 2092 , 下载积分: 资产 -2 信元, 下载支出 2 信元

 楼主| 发表于 2008-11-23 13:54:08 | 显示全部楼层

Verilog-AMS Language Reference Manual

Verilog-AMS  Language Reference Manual
VAMS-LRM-2-3.gif

VAMS-LRM-2-3.pdf

3.69 MB, 下载次数: 2073 , 下载积分: 资产 -2 信元, 下载支出 2 信元

 楼主| 发表于 2008-11-23 13:58:51 | 显示全部楼层

verilog-a3

【Verilog-AMS Sample Library】实例库

veriloga.ppt

Multiple_Analog_Blocks_v4.pdf

Verilog-A_Compact_Model_Extensions.pdf

[ 本帖最后由 xenolidar 于 2008-11-23 14:15 编辑 ]
5.GIF
3.GIF
4.GIF
Verilog-A_Compact_Model_Extensions.GIF

verilog-a3.rar

900.78 KB, 下载次数: 2797 , 下载积分: 资产 -2 信元, 下载支出 2 信元

发表于 2008-11-23 14:33:47 | 显示全部楼层
兄弟,太谢谢你了!~~
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