【Wiley 2003】RapidIO: The Embedded System Interconnect

benemale

RapidIO: The Embedded System Interconnect
by Sam Fuller

                               
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[size=120%]RapidIO: The Embedded System Interconnect
By Sam Fuller

• Publisher:   Wiley
• Number Of Pages:   380
• Publication Date:   2005-01-14
• ISBN-10 / ASIN:   0470092912
• ISBN-13 / EAN:   9780470092910
• Binding:   Hardcover

Product Description:
RapidIO - The Embedded System Interconnect brings together one essential volume on RapidIO interconnect technology, providing a major reference work for the evaluation and understanding of RapidIO. Covering essential aspects of the specification, it also answers most usage questions from both hardware and software engineers. It will also serve as a companion text to the specifications when developing or working with the RapidIO interconnect technology. Including the history of RapidIO and case of studies of RapidIO deployment, this really is the definitive reference guide for this new area of technology.



Summary: Good Reference on RapidIO technology
Rating: 4
RapidIO is an emerging technology in embedded processing applications. Given the limited technical resources available on this topic, authors have done a good job compiling a relatively comprehensive material on RapidIO technology.

Chapter 2 of the book provides a good overview of the technology and describes the physical, transport and logical layers in a nutshell. It provides the readers with just enough information to dive into more advanced topics.

Chapter 4 covers the I/O logical operations that are the heart of I/O transactions in RapidIO technology. This chapter is natural extension of chapter 2 and describes the various packet formats and the corresponding response/ acknowledgement packets.

Chapter 5 covers the messaging operations and describes the packet format and response acknowledgement for these transactions. The extension of the topic to the mailbox structure is rather informative for software developers.

Chapter 7 and 8 are written in a very meticulous way and cover most aspects of the physical layer, such as error correction, control, PMA and PCS layers.

Chapter 10 is an excellent topic on system bringup and initialization. It provides thorough and detailed information on the enumeration process, boot loading address mapping and hardware abstraction layer. The API's provided in this chapter are quite useful and provide good overview on the routing table configuration.

Chapter 14 provides the design considerations and tradeoffs for development of the RapidIO technology.

The main problem with this book is the flow and presentation of the material. Since the book is compilation of the articles and chapters by various experts in the field, the presentation of the material in the book is not consistent. You can find the same information being repeated or covered in numerous chapters (for instance the statement: "RapidIO end point can support 8-bit 0r 16 bit destination IDs" is repeated numerous times in the book). Also the index of subjects at the end of the book is not rich and can be improved substantially. I guess a good and thorough editorial review is very much needed.

I believe a reference chapter on the software embedded tools for enumeration and configuration of the fabric switches is missing in the book. Adding reference APIs for standard processors such as TI's TMS320C6455 or Freescale SC8144 would help many software engineers to quickly develop their application.

The information provided in chapters 3, 13 and 15 are too general and broad. For instance chapter 15 covers the FPGA implementation of the RapidIO without any reference on the RapidIO IP foot print (device utilization such as BRAM or logic gates/slices), power dissipation, MGT interface and timing considerations (setup and hold considerations) for FPGAs.
Adding a practical WCDMA or Wimax application with detail information on RF/Baseband interface, framing, CPRI and OPSI interface to chapter 15 would also benefit system designers who intend to adopt the RapidIO technology for the wireless base stations.


The book is not free of typo errors, here are the examples
Page 18 refers to chapter 13 on the topic of GSM while the GSM is covered in chapter 11.
Page 40 , refers the large address field as 63 bits while the correct bits is 61.
Page 154 refers the CSR and CAR discussion to chapter 18, instead of Appendix B.
Page 284 and 285 refers the maximum packet size of 276 Byts, while the max. packet size is 256 Bytes.

While I suggest this book as a good reference and starting point on RapidIO technology, I believe this book has quite some room for improvement and I encourage the authors to address the above mentioned issues in the future editions.
As the last comment, since this book addresses a dynamic and rapidly changing technology, I suggest authors to have an online website (URL) to provide the interested readers with the recent technical materials related to this subject.
RapidIO: The Embedded System Interconnect


Summary: Technology Unveiled....
Rating: 4
This book captures the whole nine yards of RapidIO as an interconnect technology for embedded and other applications. Its comprehensive, concise and provides details for a novice user as also a system designer. Well written and a must read for all technology professionals

[ 本帖最后由 benemale 于 2008-9-29 15:15 编辑 ]

zlhrsy

抢个沙发,tks a lot

tmdted

thanks

lhyi

Thanks

dram

Thanks for sharing!

jrzhang

顶一下先................

xudeqiang

好书，谢谢

austin_lin

Wow, thanks for the book! I actually know this author quite well (now in AMCC Austin)

tedious

ding ding

wubai131

好书，感谢