2008.09 IEEE JSSC

s2618017

19.Dynamic Element Matching to Prevent Nonlinear Distortion From Pulse-Shape Mismatches in High-Resolution DACs
20.A 0.4 ps-RMS-Jitter 1–3 GHz Ring-Oscillator PLL Using Phase-Noise Preamplification
21.A Millimeter-Wave Circuit Technique

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22. A 4–6.4 GHz LC PLL With Adaptive Bandwidth Control for a Forwarded Clock Link
23.A Stable 2-Port SRAM Cell Design Against Simultaneously Read/Write-Disturbed Accesses

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24.Design and Comparison of Three 20-Gb/s Backplane Transceivers for Duobinary, PAM4, and NRZ Data

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25.A 22–24 GHz 4-Element CMOS Phased Array With On-Chip Coupling Characterization

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26.Near-Optimal Equalizer and Timing Adaptation for I/O Links Using a BER-Based Metric

[ 本帖最后由 s2618017 于 2008-9-22 18:13 编辑 ]

s2618017

27.Edge and Data Adaptive Equalization of Serial-Link Transceivers

zhanweisu27

差距太大了

amswu

谢谢！！！

pipiw

非常感谢，如果可以压缩合并整理一下就更好了！

seacanoesss

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