1 Introduction...............................................................................................................1
1.1 Background.............................................................................................................1
1.2 Research contribution..............................................................................................2
1.3 Organization of the thesis........................................................................................2
2 Frequency synthesizers in radio systems...................................................................3
2.1 Radio transceiver architectures................................................................................3
2.2 Frequency synthesis techniques...............................................................................4
2.2.1 Direct analog synthesis..............................................................................5
2.2.2 Direct digital synthesis..............................................................................6
2.2.3 Indirect analog synthesis...........................................................................7
2.2.4 Hybrid synthesizers...................................................................................8
3 Frequency synthesizer requirements..........................................................................9
3.1 Functional requirements........................................................................................10
3.2 Phase noise at small offset frequencies.................................................................11
3.3 Phase noise at large offset frequencies..................................................................12
3.4 Phase noise in OFDM systems..............................................................................14
3.5 Spurious tones.......................................................................................................17
3.6 Harmonic tones......................................................................................................20
3.7 Settling time..........................................................................................................22
3.8 Other requirements................................................................................................23
4 Fractional-N phase-locked loops.............................................................................25
4.1 Problems of integer-N synthesizers.......................................................................25
4.2 Advantages of fractional-N over integer-N...........................................................26
4.3 Problems of fractional-N synthesizers...................................................................26
4.4 Spur cancellation techniques.................................................................................27
4.4.1 Analog compensation..............................................................................27 v
4.4.2 Dithering..................................................................................................28
4.4.3 ΔΣ-modulation.........................................................................................29
4.4.3.1 Fundamentals.......................................................................................29
4.4.3.2 Cascaded (MASH) modulators............................................................31
4.4.3.3 Multibit single-loop modulators...........................................................33
4.4.4 Direct modulation of the synthesizer.......................................................34
5 PLL building blocks................................................................................................37
5.1 Prescaler.................................................................................................................37
5.1.1 Fixed modulus prescalers.........................................................................37
5.1.2 Dual modulus prescalers..........................................................................38
5.1.2.1 Conventional dual modulus architecture..............................................38
5.1.2.2 Phase switching architecture................................................................41
5.1.3 Multiple modulus prescalers....................................................................42
5.2 Phase frequency detector.......................................................................................43
5.2.1 Multiplier-type phase detectors................................................................43
5.2.2 The XOR gate as a phase detector...........................................................44
5.2.3 Phase frequency detectors........................................................................45
5.3 Chargepump...........................................................................................................46
5.4 Loop filter..............................................................................................................47
5.5 Voltage-controlled oscillator.................................................................................48
5.6 Noise contributions of the building blocks............................................................50
5.7 Power dissipation of the building blocks...............................................................52
6 Synthesizers in integrated systems...........................................................................55
6.1 Local oscillator pulling..........................................................................................55
6.2 Frequency stability during switching transients.....................................................56
6.3 Spurious tones caused by coupling........................................................................57
6.4 Coupling of LO harmonics to other blocks............................................................58
6.5 Coupling of LO reference frequency to other blocks.............................................58
7 Summary of publications.........................................................................................61
8 Conclusions.............................................................................................................63