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Skew-Tolerant Circuit Design

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发表于 2008-9-2 15:42:22 | 显示全部楼层 |阅读模式

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David Harris's PH.D thesis, published as "STCD"

作者: David Harris
ISBN: 9781558606364
页数: 223
定价: USD 54.95
出版社: Morgan Kaufmann
装帧: Paperback
出版年: 2000-05



简介   · · · · · ·           As advances in technology and circuit design boost operatingfrequencies of microprocessors, DSPs and other fast chips, new designchallenges continue to emerge. One of the major performance limitationsin today's chip designs is clock skew, the uncertainty in arrival timesbetween a pair of clocks. Increasing clock frequencies are forcing manyengineers to rethink their timing budgets and to use skew-tolerantcircuit techniques for both domino and static circuits. While seniordesigners have long developed their own techniques for reducing thesequencing overhead of domino circuits, this knowledge has routinelybeen protected as trade secret and has rarely been shared.Skew-Tolerant Circuit Design presents a systematic way of achieving thesame goal and puts it in the hands of all designers.  
  This book clearly presents skew-tolerant techniques and shows how theyaddress the challenges of clocking, latching, and clock skew. Itprovides the practicing circuit designer with a clearly detailedtutorial and an insightful summary of the most recent literature onthese critical clock skew issues.
  
  * Synthesizes the most recent advances in skew-tolerant design in one cohesive tutorial
  * Provides incisive instruction and advice punctuated by humorous illustrations
  * Includes exercises to test understanding of key concepts and solutions to selected exercises

Skew-Tolerant Circuits Design.pdf

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