IEEE Transation on Circuits & Systems Part : Regular Papers/Volum55/Issue6

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Analog and Mixed Mode Circuits and Systems
1.Photodiode Peripheral Utilization Effect on CMOS APS Pixel Performance
2.Power and Area-Efficient Adaptive Equalization at Microwave Frequencies
3.On the Evaluation of the Exact Output of a Switched Continuous-Time Filter and Applications
4.An 8-bit 200-MSample/s Pipelined ADC With Mixed-Mode Front-End S/H Circuit
5.Noise Analysis of Regenerative Comparators for Reconfigurable ADC Architectures

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6.A Heterogeneous 16-Bit DAC Using a Replica Compensation
7.A Truly Low-Cost High-Efficiency ASK Demodulator Based on Self-Sampling Scheme for Bioimplantable
Applications
8.A Novel BPSK Demodulator for Biological Implants

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Digital Circuits and Systems and VLSI
9.Low-Power Ternary Content-Addressable Memory Design Using a Segmented Match Line
10.Low-Power Programmable Pseudorandom Word Generator and Clock Multiplier Unit for High-Speed SerDes
Applications
11.Fast Sign Detection for RNS

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Signal Processing

12.Robust Optical Time-of-Flight Range Imaging Based on Smart Pixel Structures
13.A Hardware-Efficient H.264/AVC Motion-Estimation Design for High-Definition Video
14.An Algorithm for the Design of Low-Power Hardware-Efficient FIR Filters
15.A Systolic-Array Architecture for First-Order 3-D IIR Frequency-Planar Filters
16.Optimal Design of Frequency-Response Masking Filters With Reduced Group Delays
17.Blind-Channel Identification for MIMO Single-Carrier Zero-Padding Block-Transmission Systems
18.ETHFB: A New Class of Even-Length Biorthogonal Wavelet Filters for Hilbert Pair Design
19.A Generalized Reverse Block Jacket Transform

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Nonlinear Circuits and Systems

20.An Unconstrained Architecture for Systematic Design of Higher Order SigmaDelta Force-Feedback Loops
21.Algorithmic ADC Offset Compensation by Nonwhite Data Chopping: System Model and Basic Theoretical Results
22.Comprehensive Behavioral Modeling of Conventional and Dual-Tuning PLLs
23.A Spur Elimination Technique for Phase-Interpolation-Based Fractional-N PLLs
24.Time-Domain Model for Injection Locking in Nonharmonic Oscillators

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25.Nonlinear Analysis of Voltage Controlled Oscillators: A Systematic Approach
26.Periodic Oscillations in Weakly Connected Cellular Nonlinear Networks
27.Adaptive Observer-Based Synchronization of Chaotic Systems With First-Order Coder in the Presence of Information
Constraints
28.A Connection Between Chaotic and Conventional Cryptography
29.29.Efficient Generation of 1_over_f^beta Noise Using Signal Modeling Techniques

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Control Theory and Systems

30.Continuous LTI Systems Defined on L^p Functions and cal D_L^{p}^prime Distributions= Analysis by Impulse

Circuits and Systems for Communications

31.Fourth-Order Cascaded Sigma Delta Modulator Using Tri-Level Quantization and Bandpass Noise Shaping for Broadband

32.A Temperature-Independent Transmitter IC for 5.8-GHz DSRC Applications

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Power Systems and Electronic Circuits

33.An Adaptive System for Optimal Solar Energy Harvesting in Wireless Sensor Network Nodes

34.Dual Low-Voltage IC Design for High-Voltage Floating Gate Drives

35.Analysis and Optimum Design of a Class E RF Power Amplifier

36.THD of Closed-Loop Analog PWM Class-D Amplifiers

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