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EETOP 创芯网论坛 (原名：电子顶级开发网)»论坛 › IC 设计及制造（半导体、微电子） › 数字IC设计【ASIC|IC前端|FPGA】 › 数字IC设计资料(IC前端|FPGA|ASIC) › 夏宇闻 Verilog 数字系统设计ppt教程

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夏宇闻 Verilog 数字系统设计ppt教程

发表于 2009-12-14 14:46:58 | 显示全部楼层

T. J. Maloney, N. Khurana,
“Transmission Line Pulsing Techniques
for Circuit Modeling of ESD Phenomena,”
Proc. Of the EOS/ESD Symposium,
1985, pp. 49-54

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发表于 2009-12-14 15:31:13 | 显示全部楼层

T. J. Maloney, N. Khurana,
“Transmission Line Pulsing Techniques
for Circuit Modeling of ESD Phenomena,”
Proc. Of the EOS/ESD Symposium,
1985, pp. 49-54

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发表于 2009-12-14 16:32:44 | 显示全部楼层

T. J. Maloney, N. Khurana,
“Transmission Line Pulsing Techniques
for Circuit Modeling of ESD Phenomena,”
Proc. Of the EOS/ESD Symposium,
1985, pp. 49-54

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发表于 2009-12-14 20:31:48 | 显示全部楼层

T. J. Maloney, N. Khurana,
"Transmission Line Pulsing Techniques
for Circuit Modeling of ESD Phenomena,"
Proc. Of the EOS/ESD Symposium,
1985, pp. 49-54

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发表于 2009-12-14 20:35:29 | 显示全部楼层

T. J. Maloney, N. Khurana,
"Transmission Line Pulsing Techniques
for Circuit Modeling of ESD Phenomena,"
Proc. Of the EOS/ESD Symposium,
1985, pp. 49-54

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发表于 2009-12-14 20:40:45 | 显示全部楼层

T. J. Maloney, N. Khurana,
"Transmission Line Pulsing Techniques
for Circuit Modeling of ESD Phenomena,"
Proc. Of the EOS/ESD Symposium,
1985, pp. 49-54

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发表于 2009-12-14 20:43:53 | 显示全部楼层

T. J. Maloney, N. Khurana,
"Transmission Line Pulsing Techniques
for Circuit Modeling of ESD Phenomena,"
Proc. Of the EOS/ESD Symposium,
1985, pp. 49-54

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发表于 2009-12-14 20:53:45 | 显示全部楼层

T. J. Maloney, N. Khurana,
"Transmission Line Pulsing Techniques
for Circuit Modeling of ESD Phenomena,"
Proc. Of the EOS/ESD Symposium,
1985, pp. 49-54

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发表于 2009-12-14 20:55:53 | 显示全部楼层

T. J. Maloney, N. Khurana,
"Transmission Line Pulsing Techniques
for Circuit Modeling of ESD Phenomena,"
Proc. Of the EOS/ESD Symposium,
1985, pp. 49-54

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发表于 2009-12-14 20:58:53 | 显示全部楼层

T. J. Maloney, N. Khurana,
"Transmission Line Pulsing Techniques
for Circuit Modeling of ESD Phenomena,"
Proc. Of the EOS/ESD Symposium,
1985, pp. 49-54

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