|
|
发表于 2008-6-5 11:28:00
|
显示全部楼层
*CSMC Confidential
*This file is the exclusive property of CSMC and shall not be distributed, reproduced or
*disclosed in whole or in part without prior permission of CSMC
*HSPICE format
************ csmc 6.0um metal gate high voltage cp02 process ************
*it is strongly recommended that you read through all the note before *
* your simulation *
*************************************************************************
* This model card includes 2 kinds of device model of Hspice version: *
* a) MOS Model *
* The MOS Model has 5 corners and each name as below: *
* .lib TT : Typical NMOS, Typical PMOS *
* .lib FF : Fast NMOS, Fast PMOS *
* .lib SS : Slow NMOS, Slow PMOS *
* .lib FS : Fast NMOS, Slow PMOS *
* .lib SF : Slow NMOS, Fast PMOS *
*************************************************************************
* b) Resistor Model *
* The Resistor Model has 3 corners and each name as below: *
* .lib restypical: typical case *
* .lib resfast: fast case *
* .lib resslow: slow case *
* this model includes only 3 kinds of resistor models named: *
* 1. pwell resistor *
* 2. n+ resistor *
* 3. p+ resistor *
* Usage example: r1 n1 n2 rnplus l=100u w=10u *
*************************************************************************
* to use these models in this style: *
* .lib 'lib_path/lib_name' lib_name *
* *
* ex: .lib '/home/user/csmc/h60mghvcp02v12.lib' tt *
* *
* for typical mos device * |
|
/2 
eetop公众号
创芯大讲堂
创芯人才网
