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Title:ESD protection designs for mixed-voltage I/O interfaces in CMOS integrated circuits
Year: 2005
Author:Kun-Hsien Lin
Degree:Ph.D.
National Chiao Tung University
Advisor: Ming Dou Ker
Abstract: .......In summary, the novel ESD protection designs have been successfully developed mixed-voltage I/O interfaces, power-down-mode application, high-voltage CMOS technology, and nanoscale CMOS technology with high ESD robustness. Each of the proposed ESD protection circuits has been practically verified in the silicon testchips. |
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