Cisco(CRDC shanghai) 招聘

yimingxn

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JOB TITLE: ASIC MicroDesign and Verification Engineer
Participate in the design of complex, high-performance, and highly integrated Network Processor chips used in Cisco's networking products. Responsibilities will include micro-architecture and logic design in Verilog. In addition, you will apply your experience in high-speed design timing closure to help partition the design to meet physical design and timing constraints. Work closely with those performing the physical implementation of the design. You will also participate in establishing methodologies for power/clock distribution, timing closure, static timing analysis, power analysis, and generally help to bridge logic design concepts to back-end physical design requirements.
RESPONSIBILITIES

    Defining and analyzing architecture and feasibility studies.

   Detailed micro-architecture specification, RTL logic design, synthesis and timing closure.

   Develop test plans, participate in reference model development and RTL verification and debug.

    Participating in reference model development, logic verification, synthesis, formal verification and static timing analysis.
SKILLS AND EXPERIENCE

  MSEE/CS combined with 1-3 years of related experience, or BSEE/CS combined with 2-4 years related experience.

  Experience in high-performance ASIC design.

  Good understanding of ASIC methodologies and flows.

  Hands-on experience with HDL (Verilog, SystemVerilog) and tools, scripting and programming languages (Perl, TCL, C++).

  Can make design tradeoffs between logical and physical design to optimize for logical requirements, physical complexity, speed, area, power and schedule.

  Knowledge in network protocol and experience in switch and router architect.

Deadline: by (Jun 30, 2008)

[ 本帖最后由 yimingxn 于 2008-5-6 13:19 编辑 ]

yimingxn

JOB TITLE: Software Engineer (2- 4 years experience)
RESPONSIBILITIES
Register level device driver implementation for high speed complex networking components; Linux kernel related development, multi-processor firmware development, line rate switch traffic implementation.
SKILLS AND EXPERIENCE·
Hand-on C and C++, including STL programming in Linux or Unix environment.
·1+ years industrial experience in multi-processor, multi-process, and multi-thread programming. Familiar with IPC and synchronization
.·Familiar with make tools, shell language, CVS/Clearcase and GDB. Familiar with KGDB is a plus.
·Familiar with embedded system, device driver and register level programming. Experienced with Linux kernel and Linux device driver model is very desirable
.·Must be speaking fluent English & a team player.
·Must be comfortable with large scale team based SW development and frequent inter-group/company communication.
·Experienced with ASIC verification or BIOS development is a plus.
·Hi-end networking switch/router SW development experience is a plus.
·Occasional travel will be required.

Deadline: by May 10, 2008

[ 本帖最后由 yimingxn 于 2008-5-6 13:20 编辑 ]