This paper presents the design and the realization of single-ended-to-fully dierential and fully dierential-
to-single-ended ampliers to be used in an audio signal processing system. The proposed blocks
allow to reduce signicantly the pin number of the developed system, while guaranteeing the high
quality (16 bit) performance required in an audio channel. The proposed circuits have been realized
in a standard 3:3V 0:35 m CMOS technology and achieve a Dynamic Range in excess of 90 dB
with a Total Harmonic Distortion lower than −80 dB for a full scale signal amplitude. Their power
consumption (≈6mW and each) and the area (0:1mm2 each) are nally negligible with respect to the
other blocks in the overall systems. Copyright ? 2003 John Wiley & Sons, Ltd.