[原创]why should we add GPIO feature on chip?

BuildGates · 发表于 2003-8-25 21:00:40

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for system board usage, to communicate with other board?
is it related 8255 (PROGRAMMABLE PERIPHERAL INTERFACE)mode 0?

bravelu · 发表于 2003-8-26 09:34:10

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该贴子是管理员从<a href=forums.cgi?forum=5>ASIC/FPGA/CPLD 设计</a>转移过来的！

BuildGates · 发表于 2003-8-26 10:26:07

Generally, if CPU has a ICE interface that will be the best way to debug. The second choice is to use UART for dumping some message. The 3rd choice uses so called 80 port to latch data bus of one debug port. The last way is GPIO.

dreamwalker · 发表于 2013-12-4 22:46:26

english is very important ==

jeffej · 发表于 2015-11-23 21:02:25

we add GPIO feature on chip

[原创]why should we add GPIO feature on chip?

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