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[2] 3GPP, “TS 36.212 V8.0.0”, Sept. 2007.
[3] J. Sun, O. Y. Takeshita, “Interleavers for Turbo codes using permutation polynomials over integer rings”, IEEE Tran. Info. Theory, Vol. 51, No.1, Jan. 2005.
[4] O. Y. Takeshita, “On maximum contention-free interleavers and permutation polynomials over integer rings”, IEEE Trans. Info. Theory, Vol. 52, No. 3, Mar. 2006.
[5] W. J. Gross, P. G. Gulak, “Simplified MAP algorithm suitable for implementation of Turbo decoders”, Electronics Lett., Vol. 34, Aug. 1998.
[6] B. Classon, K. Blankenship, V. Desai, “Turbo decoding with the constant-Log-MAP algorithm”, Proc. Second International Symposium on Turbo Codes and Related Topics, Sept. 2000.
[7] J. F. Cheng, T. Ottosson, “Linearly approximated log-MAP algorithms for turbo decoding”, Proc. 51 st IEEE Vehicular Technology Conference, Vol. 3, May 2000.
[8] H. Wang, H. W. Yang, D. C. Yang, “Improved log-MAP decoding algorithm for Turbo-like codes”, IEEE Comm. Lett., Vol. 10, No. 3, Mar. 2006.
[9] T. C. Kuo, A. N. Willson, “Low –latency memory-efficient 150-Mbps Turbo FEC encoder and Decoder”, IEEE International Symposium on Circuits and Systems (ISCAS), 2007.
[10] P.J. Black, T.H. Meng, “A 140-Mb/s, 32-state,radix-4 Viterbi decoder”, IEEE J. Solid-State Circuits, Vol. 27, No. 12, Dec. 1992.
[11] M. Bickerstaff, L. Davis, C. Thomas, etc., “A 24Mb/s Radix-4 Turbo Decoder for 3GPP-HSDPA Mobile Wireless”, IEEE International Solid-state Circuits conference, 2003.
[12] S. J. Lee, N. R. Shanbhag, A. C. Singer, “Area-efficient high-throughput MAP decoder architectures”, IEEE Trans. VLSI Systems, Vol. 13, No. 8, Aug. 2005.
[13] Z. F. Wang, Z. P. Chi, K. K. Parhi, “Area-efficient high-speed decoding schemes for Turbo decoders”, IEEE Trans. VLSI Systems, Vol. 10, No. 6, Dec. 2002.
[14] Z. Y. He, P. Forter, S. Roy, “Highly-parallel decoding architectures for convolutional codes”, IEEE Trans. VLSI Systems, Vol. 14, No. 10, Oct. 2006.
[15] X. Z. Lou, Y. M. Chen, “Pipelined parallel architectures for high throughput turbo decoding”, IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 2006.
[16] 3GPP, “R1-070055_Performance_CF_interleavers”, 3GPP, Jan. 2007. |
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