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As integrated circuit fabrication techniques advance, a complexsystemcan be integrated on a single chip: namely, a system-on-a-chip(SOC). ASOC consists of many intellectual property (IP) buildingblocks,including analog-to-digital converters (ADCs) anddigital-to-analogconverters (DACs) which should provide certainbuilt-in self-test(BIST) scheme to minimize the testing cost.Due to the analog nature of ADCs and DACs, digital BIST schemes arenotapplicable. This paper proposes a simple ADC BIST scheme based onaramp test. The proposed BIST scheme is veried by simulation witha6-bit pipelined ADC. Simulation results show that the proposed ADCBISTscheme can detect not only catastrophic faults but also someparametricfaults. The total gate count of the proposed BIST circuit isabout 150. |
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BIST_ADC.pdf
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