[清晰PDF版] Embedded Controller Hardware Design

KF3

书名：Embedded Controller Hardware Design
作者：Ken Arnold
页数：245
目录：
1 Review of Electronics Fundamentals.............................. 1
Objectives ........................................................................................... 2
Embedded Microcomputer Applications.............................................. 2
Microcomputer and Microcontroller Architectures............................... 4
Digital Hardware Concepts ................................................................. 6
Voltage, Current, and Resistance ............................................................ 7
Diodes...................................................................................................... 9
Transistors ............................................................................................... 9
Mechanical Switches ............................................................................... 10
Transistor Switch ON ............................................................................... 11
Transistor Switch OFF ............................................................................. 12
The FET as a Logic Switch ...................................................................... 12
NMOS Logic............................................................................................. 13
CMOS Logic............................................................................................. 14
Mixed MOS .............................................................................................. 16
Real Transistors DonÌt Eat Q! .................................................................. 16
Logic Symbols..................................................................................... 17
Tri-State Logic.......................................................................................... 18
Timing Diagrams ................................................................................. 19
Multiplexed Bus ................................................................................... 20
Loading and Noise Margin Analysis .................................................... 21
The Design and Development Process............................................... 21
Chapter One Problems ....................................................................... 22
2 Microcontroller Concepts ................................................. 23
Organization: von Neumann vs. Harvard ............................................ 24
Microprocessor/Microcontroller Basics ............................................... 24
Microcontroller CPU, Memory, and I/O .................................................... 25
Design Methodology ................................................................................ 26
The 8051 Family Microcontroller Processor Architecture ................... 27
Introduction to the 8051 Architecture ....................................................... 28
Memory Organization............................................................................... 30
CPU Hardware ......................................................................................... 32
Oscillator and Timing Circuitry ................................................................. 41
The 8051 Microcontroller Instruction Set Summary ............................ 42
Direct and Register Addressing ............................................................... 43
Indirect Addressing .................................................................................. 46
Immediate Addressing ............................................................................. 50
Generic Address Modes and Instruction Formats.................................... 51
Address Modes ........................................................................................ 52
The Software Development Cycle ........................................................... 55
Software Development Tools ................................................................... 55
Hardware Development Tools ................................................................. 56
Chapter Two Problems ....................................................................... 56
3 Worst- Case Timing, Loading, Analysis, and Design .... 57
Timing Diagram Notation Conventions ............................................... 58
Rise and Fall Times ................................................................................. 59
Propagation Delays.................................................................................. 59
Setup and Hold Time ............................................................................... 60
Tri-State Bus Interfacing .......................................................................... 61
Pulse Width and Clock Frequency ........................................................... 62
Fan-Out and Loading Analysis„DC and AC ......................................... 63
Calculating Wiring Capacitance ............................................................... 66
Fan-Out When CMOS Drives LSTTL....................................................... 68
Transmission Line Effects........................................................................ 70
Ground Bounce........................................................................................ 72
Logic Family IC Characteristics and Interfacing .................................. 75
Interfacing TTL Compatible Signals to 5 Volt CMOS ............................... 78
Design Example: Noise Margin Analysis Spreadsheet............................ 82
Worst-Case Timing Analysis Example ..................................................... 90
Chapter Three Review Problems ........................................................ 92
4 Memory Technologies and Interfacing............................ 95
Memory Taxonomy ............................................................................. 96
Secondary Memory.................................................................................. 97
Volatility.................................................................................................... 98
Random Access Memory ......................................................................... 98
Sequential Access Memory ..................................................................... 99
Direct Access Memory ............................................................................. 99
Read/Write Memories ......................................................................... 100
Read-Only Memory............................................................................. 101
Other Memory Types .......................................................................... 104
JEDEC Memory Pin-Outs ................................................................... 105
Device Programmers .......................................................................... 106
Memory Organization Considerations................................................. 107
Parametric Considerations .................................................................. 109
Asynchronous vs. Synchronous Memory............................................ 110
Error Detection and Correction ........................................................... 111
Error Sources ........................................................................................... 111
Confidence Checks.................................................................................. 111
Memory Management ......................................................................... 113
Cache Memory......................................................................................... 114
Virtual Memory ......................................................................................... 114
CPU Control Lines for Memory Interfacing .............................................. 115
Chapter Four Problems....................................................................... 115
Read and Write Operations................................................................. 117
5 CPU Bus Interface and Timing ......................................... 117
Address, Data, and Control Buses...................................................... 118
Address Spaces and Decoding........................................................... 120
Address Map ....................................................................................... 122
Chapter Five Problems ....................................................................... 124
The Central Processing Unit (CPU) .................................................... 125
6 A Detailed Design Example .............................................. 125
External Data Memory Cycles............................................................. 134
External Memory Data Memory Read...................................................... 134
External Data Memory Write.................................................................... 136
Design Problem 1................................................................................ 138
Design Problem 2................................................................................ 139
Design Problem 3................................................................................ 140
Completing the Analysis .......................................................................... 142
Chapter Six Problems ......................................................................... 143
Memory Selection and Interfacing ...................................... 126
Preliminary Timing Analysis ............................................... 127
7 Programmable Logic Devices .......................................... 145
Introduction to Programmable Logic ................................................... 147
Technologies: Fuse-Link, EPROM, EEPROM, and RAM Storage .......... 147
PROM as PLD ......................................................................................... 150
Programmable Logic Arrays .................................................................... 151
PAL-Style PLDs ....................................................................................... 151
Design Examples ................................................................................ 153
PLD Development Tools .......................................................................... 155
Simple I/O Decoding and Interfacing Using PLDs .............................. 157
IC Design Using PCs .......................................................................... 157
Chapter Seven Problems .................................................................... 159
Direct CPU I/O Interfacing................................................................... 161
8 Basic I/ O Interfaces .......................................................... 161
Port I/O for the 8051 Family ................................................................ 162
Output Current Limitations .................................................................. 166
Simple Input/Output Devices............................................................... 169
Matrix Keyboard Input.............................................................................. 170
Matrix Display Devices............................................................................. 171
Program-Controlled I/O Bus Interfacing .............................................. 173
Real-Time Processing.............................................................................. 175
Direct Memory Access (DMA) ............................................................. 175
Burst vs. Single Cycle DMA ..................................................................... 176
Cycle Stealing .......................................................................................... 177
Elementary I/O Devices and Applications ........................................... 178
Timing and Level Conversion Considerations ......................................... 180
Level Conversion ..................................................................................... 180
Power Relays ........................................................................................... 180
Chapter Eight Problems ...................................................................... 181
9 Other Interfaces and Bus Cycles ..................................... 183
Interrupt Cycles ................................................................................... 184
Software Interrupts .............................................................................. 184
Hardware Interrupts ............................................................................ 184
Interrupt Driven Program Elements ......................................................... 186
Critical Code Segments ........................................................................... 187
Semaphores............................................................................................. 188
Interrupt Processing Options ................................................................... 189
Level and Edge Triggered Interrupts ....................................................... 190
Vectored Interrupts .................................................................................. 192
Non-Vectored Interrupts........................................................................... 193
Serial Interrupt Prioritization ..................................................................... 194
Parallel Interrupt Prioritization .................................................................. 194
Construction Methods ......................................................................... 197
10 Other Useful Stuff............................................................ 197
Electromagnetic Compatibility ............................................................. 199
Electrostatic Discharge Effects ........................................................... 199
Fault Tolerance ................................................................................... 200
Hardware Development Tools............................................................. 201
Instrumentation Issues ............................................................................. 202
Software Development Tools .............................................................. 203
Other Specialized Design Considerations........................................... 203
Thermal Analysis and Design .................................................................. 204
Battery Powered System Design Considerations .................................... 205
Processor Performance Metrics.......................................................... 206
Device Selection Process ................................................................... 207
Power and Ground Planes................................................... 198
Ground Problems ................................................................. 198
11 Other Interfaces............................................................... 209
Analog Signal Conversion................................................................... 210
Special Proprietary Synchronous Serial Interfaces ............................. 211
Unconventional Use of DRAM for Low Cost Data Storage ................. 211
Digital Signal Processing / Digital Audio Recording ............................ 212
Detailed Checklist ............................................................................... 215
A Hardware Design Checklist ............................................. 215
Define Power Supply Requirements ................................................... 216
Verify Voltage Level Compatibility....................................................... 217
Check DC Fan-Out: Output Current Drive vs. Loading ....................... 218
AC (Capacitive) Output Drive vs. Capacitive Load and De- rating...... 218
Verify Worst Case Timing Conditions ................................................. 219
Determine if Transmission Line Termination is Required ................... 219
Clock Distribution ................................................................................ 220
Power and Ground Distribution ........................................................... 220
Asynchronous Inputs........................................................................... 222
Guarantee Power-On Reset State ...................................................... 222
Programmable Logic Devices ............................................................. 222
Deactivate Interrupt and Other Requests on Power-Up...................... 223
Electromagnetic Compatibility Issues ................................................. 223
Manufacturing and Test Issues ........................................................... 223
Books .................................................................................................. 225
B References, Web Links, and Other Sources .................. 225
Web and FTP Sites ............................................................................. 226
Periodicals: Subscription ..................................................................... 227
Periodicals: Advertiser Supported Trade Magazines .......................... 228
Programming Microcontrollers in C, Second Edition ............................... 233
Embedded Controller Hardware Design .................................................. 233
Controlling the World with Your PC ......................................................... 233
The Forrest Mims Engineers Notebook ................................................... 233
The Forrest Mims Circuit Scrapbook, Volumes I and II ........................... 233
The Integrated Circuit Hobbyists . .H..a..n..d..b..o..o..k........................... 233
Simple, Low-Cost Electronics Projects .................................................... 233

[ 本帖最后由 KF3 于 2008-3-13 12:50 编辑 ]

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