有关ICC2中如何连接Power Switch的PG pin的问题

pbsoft

小弟在学习低功耗流程，现有一些问题想请教一下；
1. 是先Route PG还是先放Power Switch？
2. 我尝试过先放和后放，Power Switch的VDD输入pin都不会自动跟VDD PG Strip相连，我是缺少什么步骤吗？还是说在走线阶段ICC2会去连power switch的VDD输入pin？

谢谢！
相关脚本：

1. create_pg_std_cell_conn_pattern pattern_pg_rail -layers M2 ;#-rail_width {@w} -parameters {w}
   
2. create_pg_wire_pattern pattern_stripe -layer @l -direction @d -width @w -spacing @s -pitch @p -track_alignment @t -parameters {l d w s p t}
   
3. create_pg_wire_pattern pattern_wire_based_on_track -layer @l -direction @d -width @w -spacing @s -pitch @p -parameters {l d w s p} -track_alignment track
   
4. 
   
5. set_pg_strategy strategy_pg_rail -pattern "{name: pattern_pg_rail} {nets: VDD_TOP VSS_TOP} " -voltage_areas DEFAULT_VA
   
6. set_pg_strategy strategy_pg_rail_PD_OFF -pattern "{name: pattern_pg_rail} {nets: VDD_OFF_SW VSS_TOP} " -voltage_areas PD_OFF
   
7. compile_pg -strategies {strategy_pg_rail} -tag pg_rail
   
8. compile_pg -strategies {strategy_pg_rail_PD_OFF} -tag pg_rail
   
9. 
   
10. ### DEFAULT_VA PG Stripes
    
11. create_pg_composite_pattern pattern_mesh_M8_TOP -nets {VDD_TOP VSS_TOP} -add_patterns {{{pattern: pattern_wire_based_on_track} {nets: {VDD_TOP VSS_TOP}} {parameters: {M8 vertical 2 1 6 }}{offset: 3 }}}
    
12. create_pg_composite_pattern pattern_mesh_M9_TOP -nets {VDD_TOP VSS_TOP} -add_patterns {{{pattern: pattern_wire_based_on_track} {nets: {VDD_TOP VSS_TOP}} {parameters: {TM1 horizontal 7 1 20 }}{offset: 3 }}}
    
13. create_pg_composite_pattern pattern_mesh_M10_TOP -nets {VDD_TOP VSS_TOP} -add_patterns {{{pattern: pattern_wire_based_on_track} {nets: {VDD_TOP VSS_TOP}} {parameters: {TM2 vertical 7 1 20 }}{offset: 3 }}}
    
14. set_pg_strategy strategy_mesh_M8_TOP -pattern {{name: pattern_mesh_M8_TOP} {nets: {VDD_TOP VSS_TOP}}} -design_boundary
    
15. set_pg_strategy strategy_mesh_M9_TOP -pattern {{name: pattern_mesh_M9_TOP} {nets: {VDD_TOP VSS_TOP}}} -design_boundary
    
16. set_pg_strategy strategy_mesh_M10_TOP -pattern {{name: pattern_mesh_M10_TOP} {nets: {VDD_TOP VSS_TOP}}} -design_boundary
    
17. 
    
18. set_pg_strategy_via_rule via_pg_core -via_rule { \
    
19. {{{existing : std_conn }}{{strategies: strategy_mesh_M8_TOP}{layers: M8}}{via_master:default}} \
    
20. {{{existing : std_conn }}{{strategies: strategy_mesh_M9_TOP}{layers: TM1}}{via_master:default}} \
    
21. {{{existing : std_conn }}{{strategies: strategy_mesh_M10_TOP}{layers: TM2}}{via_master:default}} \
    
22. {{intersection: adjacent}{via_master: default}} }
    
23. 
    
24. ### place power switches
    
25. set_app_options -name plan.pna.power_switch_resistance -value {{HEADBUF16_X1M_A9TR40 10}}
    
26. set_power_switch_placement_pattern -name p1 -placement_type "array" -direction vertical -connect_mode daisy -driver HEADBUF16_X1M_A9TR40 -pattern {HEADBUF16_X1M_A9TR40}
    
27. create_power_switch_array -power_switch SWITCH_RULE_ONE -pattern p1  -x_pitch 10 -y_pitch 10 -pg_strategy {strategy_mesh_M8_TOP VDD_TOP M8} -checkerboard even
    
28. connect_pg_net -automatic
    
29. ### END
    
30. 
    
31. compile_pg -strategies {strategy_mesh_M8_TOP strategy_mesh_M9_TOP strategy_mesh_M10_TOP} -tag pg_stripes -via_rule {via_pg_core} -show_phantom
    

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king-wa

这个是要手动连的

pbsoft

king-wa 发表于 2025-5-30 09:33
这个是要手动连的

您是说power switch的输入VDD需要手动去连？我看INNOVUS好像布线的时候会去自动连primary_power，ICC2是不会去连的吗？