求几篇paper

hzx85337856

https://ieeexplore.ieee.org/docu ... er=papers#citations

https://ieeexplore.ieee.org/document/9535163
https://ieeexplore.ieee.org/document/9930342
https://ieeexplore.ieee.org/document/10121250
https://ieeexplore.ieee.org/document/9738817
https://ieeexplore.ieee.org/document/9598182

aiolos65

1.A 112-Gb/s Serial Link Transceiver With Three-Tap FFE and 18-Tap DFE Receiver for up to 43-dB Insertion Loss Channel in 7-nm FinFET Technology
2.A 112-Gb/s PAM-4 Low-Power Nine-Tap Sliding-Block DFE in a 7-nm FinFET Wireline Receiver
3.A 1.41-pJ/b 224-Gb/s PAM4 6-bit ADC-Based SerDes Receiver With Hybrid AFE Capable of Supporting Long Reach Channels
4.Calibration Techniques for Optimizing Performance of High-Speed ADCs
5.Background Timing Mismatch Calibration Techniques in High-Speed Time-Interleaved ADCs: A Tutorial Review
6.A 13-Bit 2-GS/s Time-Interleaved ADC With Improved Correlation-Based Timing Skew Calibration Strategy

hzx85337856

谢谢！！