Design Verification Engineer

KT咨询-IC电子

NO.400-【猎头职位：西安需要多位  Design Verification Engineer】联系人：Sophie-Song,邮箱：hr@kthr.com，微信也可查询职位了！打开手机微信，搜号码“KTHR_COM”或查找微信公众帐号“KT人才”或扫描以上二维码即可添加，欢迎大家关注！

岗位职责：

1、Participate ASICdigital verification for various IP/SoC projects;

2、Create verificationplans and execution;

3、Develop virtualprototype modeling for algorithm logic;

4、Develop DVarchitecture and verification environment;

5、Verificationexecution and sign-off.

岗位要求：

1、Excellent teamworking style;

2、Solid IP/SoCverification background;

3、Experience withIP/SoC sign-off;

4、Master with 2+ yearsworking experiences on ASIC digital verification;

5、Productionexperiences on verification strategies and vPlan extraction and execution;

6、Familiar withSystemVerilog/UVM for testbench creation, debug, reuse, constrained-randomstimulus and functional coverage;

7、CXL / DSP experienceis an advantage;

8、Direct test at SoClevel is a must, low level driver awareness is an advantage;

9、Project experienceson ARM buses, such as AXI/AMBA/APB is an advantage;

10、Familiar withverification tools;

11、Familiar with Linux,csh/Python or any script languages;

12、Good English skills(read and write);

Additionally:

13、Having crypto(e.g.ECC, AES, RSA, SM2/3/4, TRNG…) knowledge is a plus;

14、Typical serial busexperiences, e.g. I2C, I3C, SMBus protocol knowledge is a plus.

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