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Aprisa Place-and-Route
Designing at advanced process nodes requires a new place-and-route paradigm to manage the increasing complexity. Aprisa is a route-centric physical design platform for the modern SoC.
Specialized for Advanced Nodes
Leading foundry certified for advanced nodes. Innovative technologies, such as native color-aware MPT routing, Sibling Routing, congestion-aware low-resistance routing, and IR-aware and EM-aware place-and-route help to mitigate design challenges and deliver highest quality of results at advanced nodes.
Aprisa overcomes advanced-node design complexities by taking into account the impacts of detailed route information throughout the entire physical design flow. With its innovative detailed-route-centric software architecture, Aprisa makes detailed route information available to each place and route task. The result is faster time-to-closure with excellent quality-of-results.
The detailed route-centric Aprisa automatic digital place-and-route (P&R) system offers complete functionalities for both top-level hierarchical design and block-level physical implementation for complex digital IC design projects. It includes cutting-edge technologies in proto-typing, floor-planning, chip-assembly, placement, clock tree synthesis, routing, optimization, and embedded analysis engines.
The core of the technology is the detailed-route-centric architecture and hierarchical database, specifically developed to address the design challenges with advanced FinFET technology.
Home:
https://eda.sw.siemens.com/en-US/ic/ic-design/place-route/
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