Introducing Technology Computer-Aided Design

xhwubai · 发表于 2018-8-14 22:58:58

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本帖最后由 xhwubai 于 2018-8-15 14:07 编辑

Introducing Technology Computer-Aided Design.zip (13.48 MB, 下载次数: 145 )
About the Author

Chinmay K. Maiti received his B.Sc. (Hons.) in physics (1969), B.Tech. in applied physics (1972), and M.Tech. in radio physics and electronics (1974) from the University of Calcutta, India. He then did his M.Sc. (Res.) in microelectronics (1976) from Loughborough University, UK, and PhD (Eng.) in microelectronics (1984) from the Indian Institute of Technology (IIT), Kharagpur, India. He later joined IIT as professor and was head of the department (2009–2012). From 2004 to 2006 he was a visiting professor at Queen’s University, Belfast, UK. Ignoring an extension offer from IIT, he joined the SOA University, Bhubaneswar, India, in 2015. Dr. Maiti won the INSA-Royal Society (UK) Exchange of Scientists Fellowship in 2003, the CDIL Award for Industry of the Institution of Electronics and Telecommunication Engineers for the best paper in 1997, and the West Bengal Academy of Sciences Fellowship in 2007. He is interested in semiconductor device/process simulation research and microelectronics education. He has published more than 265 technical articles in the silicon-germanium and heterostructure-silicon areas, written 6 monographs and 6 book chapters, and edited Selected Works of Professor Herbert Kroemer (World Scientific, Singapore, 2008).

contents note: 1.1.The Need
1.2.Role of TCAD
1.3.TCAD: Challenges
1.4.TCAD: 2D versus 3D
1.5.TCAD: Design Flow
1.6.Extending TCAD
1.7.Process Compact Model
1.8.Process-Aware Design
1.9.Design for Manufacturing
1.10.TCAD Calibration
1.11.TCAD Tools
1.12.Technology Boosters
1.13.BiCMOS Process Simulation
1.14.SiGe and SiGeC HBTs
1.15.Silicon Hetero-FETs
1.16.FinFETs
1.17.Advanced Devices
1.18.Memory Devices
1.19.Power Devices
1.20.Solar Cells
1.21.TCAD for SPICE Parameter Extraction
1.22.TCAD for DFM
1.23.VWF and Online Laboratory
1.24.Summary
2.1.History of Process and Device Simulation Tools
2.2.Commercial TCAD Tools
2.3.Silvaco Tool Overview
2.3.1.MaskViews
2.4.ATHENA
2.5.ATLAS
2.5.1.Physical Structure
2.5.2.Structure Editing
2.5.3.Meshing
2.5.4.Mesh Definition
2.5.5.Regions and Materials
2.5.6.Physical Models
2.5.6.1.Models
Contents note continued: 2.5.7.Impact Ionization Models
2.5.7.1.C-Interpreter functions
2.5.8.Gate Current Models
2.5.9.Bandgap Narrowing
2.5.10.Solution Methods
2.5.11.VictoryCell
2.5.12.VictoryProcess
2.5.13.VictoryStress
2.5.13.1.VictoryStress features and capabilities
2.5.14.VictoryDevice
2.6.Stress Modeling
2.6.1.Stress-Strain Relationship
2.6.2.Mobility
2.6.3.SmartSpice
2.7.Synopsys TCAD Platforms
2.7.1.Taurus-Device
2.7.2.Taurus-Process
2.7.3.Device Simulation
2.7.4.Carrier Recombination-Generation
2.7.4.1.Thin-layer mobility
2.7.4.2.High-k degradation mobility
2.7.5.Stress Effects
2.7.5.1.Band-to-band tunneling leakage current
2.8.Atomistic Simulation
2.8.1.GARAND
2.8.2.MYSTIC
2.8.3.RandomSPICE
2.9.Summary
3.1.Stress Engineering
3.1.1.Unintentional Mechanical Stress
3.2.Intentional Mechanical Stress
3.3.Stress-Engineered Transistors
3.3.1.CESL
3.3.2.STI Stress
Contents note continued: 3.4.Hybrid Orientation Technology
3.5.High-k/Metal Gate
3.6.Stress Evolution during Semiconductor Fabrication
3.6.1.Stress Modeling Methodology
3.6.2.Stress Evolution during Thick Stress Layer Deposition
3.6.3.Stress Evolution in Thick Stress Layer Deposition in 3D
3.7.Summary
4.1.Ion Implantation Simulation
4.2.Optical Lithography Simulation
4.3.Contact-Printing Simulation
4.3.1.Nonplanar Lithography
4.4.BIT Process Simulation
4.4.1.Polysilicon Emitter Bipolar Technology
4.5.3D MOS Process Simulation
4.5.1.VictoryProcess
4.6.Summary
5.1.SiGe HBTs: Process and Device Simulation
5.2.High-Speed SiGe HBTs
5.3.SiGeC HBTs: Process and Device Simulation
5.4.Strain-Engineered SiGe HBTs
5.5.n-p-n SiGe HBTs with an Extrinsic Stress Layer
5.6.n-p-n SiGe HBT Device Employing a Si3N4 Strain Layer
5.7.n-p-n SiGe HBT Employing a SiO2 Strain Layer
5.8.Summary
Contents note continued: 6.1.Electronic Properties of Strained Si and SiGe
6.1.1.Hole Mobility
6.1.2.Electron Mobility
6.2.Strained-Si Channel p-MOSFETs
6.3.Summary
7.1.Basics of FinFETs
7.1.1.Stress-Enhanced Mobility in Embedded SiGe p-MOSFETs
7.2.Stress-Engineered FinFETs
7.2.1.VictoryCell Process Steps
7.2.2.Visualization and Analysis of Simulation Results, Extraction of Average Stresses, and Mobility Enhancement Factors
7.3.FinFET Design and Optimization
7.3.1.Simulation Setup
7.4.Summary
8.1.Ultrathin-Body SOI
8.2.Gate-First SOI
8.3.Gate-Last SOI
8.4.3D SDI n-MOSFET
8.5.TFT
8.6.HEMTs
8.6.1.Thermal Optimization Using a Flip-Chip Structure
8.7.A1GaN/GaN HFET
8.8.3D SiC Process and Device Simulation
8.8.1.Device Simulation
8.9.Summary
9.1.Nanocrystal Floating-Gate Device
9.1.1.Advanced Nanocrystal Floating-Gate Devices with High-k Dielectrics
9.2.Technology Computer-Aided Design of Memory Devices
Contents note continued: 9.3.Process Simulation of Flash Memory Devices
9.4.Device Simulation of Flash Memory Devices
9.5.State Transition and Single-Event Upset in SRAM
9.6.Nanoscale SRAM
9.7.Summary
10.1.LDMOS
10.2.Vertically Diffused MOS Devices
10.3.Summary
11.1.Solar Cell Simulation
11.2.Organic Solar Cells
11.3.Tandem Solar Cells
11.4.3D Solar Cell Simulation
11.5.Summary
12.1.Compact Model Generation
12.2.Compact Modeling of HBTs
12.2.1.VBIC
12.2.2.MEXTRAM
12.2.3.HICUM
12.3.Device Characterization
12.3.1.ICCAP Device Modeling: 1/f Noise Measurement Configuration
12.4.Parameter Extraction Methodology
12.5.UTMOST
12.5.1.BSIM3
12.5.2.Parameter Extraction
12.6.Summary
13.1.Process-Aware Design for Manufacturing
13.1.1.Seismos
13.1.2.Paramos
13.1.3.Fammos
13.2.TCAD for Manufacturing
13.3.TCAD for DFM
13.4.Process Compact Models
13.4.1.Process Parameterization
Contents note continued: 13.4.2.Process Calibration
13.4.3.TCAD Validation
13.4.4.PCM Simulation
13.5.Summary
14.1.Internet-Based TCAD Laboratory
14.2.Microelectronics and VLSI Engineering Laboratory Module
14.2.1.Integrated Technology CAD Laboratory
14.3.SPICE Parameter Extraction
14.4.Summary.
1. Introduction
2. Technology CAD tools
3. Technology boosters
4. BiCMOS process simulations
5. SiGe and SiGeC HBTs
6. Silicon hetero-FETs
7. FinFETs
8. Advanced devices
9. Memory devices
10. Power devices
11. Solar cells
12. TCAD for SPICE parameter extraction
13. Technology CAD for DFM
14. VWF and online laboratory.

tu_yjq123 · 发表于 2018-8-18 22:26:45

多谢分享

student321 · 发表于 2018-8-19 19:08:20

thanks

zhyu101 · 发表于 2018-8-22 11:13:59

非常好的资料，谢谢楼主

felicris · 发表于 2019-4-20 08:55:33

Thanks

九龙城 · 发表于 2019-4-21 13:32:39

好东西

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