please help for ICC floorplanning

xiaoyisimonguo

After import_designs successfully,
import_designs -format verilog -top $TOP_design -cel $TOP_design {../ref/design_data/ORCA_timingRun.v}


I tried to create floorplan:
create_floorplan -control_type boundary -start_first_row -left_io2core 2.96 -bottom_io2core 2.96 -right_io2core 2.96 -top_io2core 2.96 -keep_io_place

and I got the following:
Error: There is no net in this design. Please fix this problem.  (APL-075)
Error: Planner run through unsuccessful.  (APLUI-102)


I don't understand this, the verilog netlist, ORCA_timingRun.v should have nets, should be a lot of those,  what can I fix, please help