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CT ∆ΣADCs advantage:
1) high speed and low power requirement
2) inherent anti-aliasing properties without SC noise
3) lower the switch performance without the SC based front-end
4) high input impedance and save the input buffer
5) absence of stringent settling requirements enables CT converters to digitize signals up to several hundred MHz
disadvatages:
1)sensitive to clock jitter 2)the loop coefficient are sensitive to technology parameters
3)modulator is dependent on clock frequency 4)sensitive to feedback loop delay
SC ∆ΣADCs advantage:
1)mature design methodologies and robustness 2)achieve relatively high linearity and high resolution
3) tolerant of clock jitter 4) the filter coefficients are very stable 5)the filter coefficients is independent on clock frequency |
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