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发表于 2013-12-26 23:37:32
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本帖最后由 Ftungcuala01 于 2013-12-26 23:38 编辑
#I reply in English 'cause I do not know Chinese.
I think there are 3 options you can choose: Synopsys Formality, Cadence Conformal LEC and Mentor FormalPro.
I do not have chance to touch Cadence or Mentor tools so I'll talk about Formality.
(You can still try Cadence Conformal 10.1 version in this forum. I've already downloaded it but can not run!).
For Formality, you can try the "Jumpstart Training v2008" document + labs. There is also "Formality Debugging Failing Verification" documents + labs. Those are good reference to practice.
You also should be familiar with the GUI mode especially how to trace the logic cones and find out the suspected failing points.
Last time I tried to use the Group/Ungroup command + Highlight Color command to find the suspected points. It's very useful.
I think Formality also provides some guidance to Design Compiler to re-execute the synthesis phase (especially for the datapath related problems). If you have some experience about DC, it would be useful too.
That's all I have :-)
Good luck to you,
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