美资IC设计公司招聘Sr. ASIC design engineer

logan95

老牌美资IC设计公司 曾经开发了世界上第一款商用集成电路  有兴趣的发邮件或加MSN：cms020619@yahoo.com.cn

Job Title:  Senior ASIC digital design engineer （北京）

Responsibility  
•       In charge of digital design and verification in Mix-signal chip
•       Take part in all ASIC design flow including Coding, Verification, Synthesis, STA, Place and Route
•       Perform functional verification of designs on block and AMS level.
•       Perform pre- and post-layout timing closure
•       Perform physical design including floor planning, timing closure, place&route, physical verification etc.
•       Develop and improve design quality like area, power, timing and ATPG coverage
Requirement  
•       MS Degree, 5+ years experience in digital ASIC design and verification
•       Experience in ASIC design flow (logic synthesis, STA, formality check, P&R, Design for Test), familiar with the usage of related EDA tools
•       Experience with design for verification (assertion based design strategies, code coverage, functional coverage, test plan, gate-level simulation, back-annotation etc.). Mixed-signal verification background would be an added advantage.
•       Strong understanding of synthesis flow
•       Strong STA skills
•       Hands on experience with formal verification tools such as LEC and/or formality
•       Familiar with Back-End EDA tools (synopsys,cadence,magma)
•       Familiar with Linux Environment
•       Ability to build new EDA-methodology-flow using perl, tcl and shell programming would be an added advantage
•       Good communication skills, strong interpersonal skills and the flexibility Dedicated, hard working and good team player