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Digital Design Engineer Job Description - Candidates for this position should have experience in the design and design management of large, high-speed, mixed signal SoCs. The designs must have contained a variety of both hard and soft-macro IP blocks. The candidate should be an expert in all parts of the SoC flow from IP deliverable hand-offs (in RTL or gate), to synthesis, DFT and test insertion, floorplanning, P&R, timing closure, signal integrity, power analysis and verification. After at least 5 years of design experience the candidate should have 3 years of design management experience. MS or higher degree in EE is required. Requirements/Qualifications (Education) - MSEE or higher degree in EE required. 2.
Digital Design Engineer Job Description - Working with an Architecture/Algorithm Development Team to finalize system architecture - for optimal implementation of digital signal processing algorithms, including architectural - Definition and tradeoffs, die size, power estimation. Requirements/Qualifications (Education) - Digital logic design, verilog coding, logic synthesis, both RTL and gate level verification,formal verification and static timing analysis. Unix shell, Perl scripting, C/RTL co-simulation. - Sound theory background of communication and Digital signal processing |