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发表于 2010-4-1 00:37:10
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calibre lvs/drc will export gds file from virtuoso before the actual check.
while for post-simulation, first, u need to use rc-extraction tool(startRC/QRC/calibreRC) to extract the rc information from virtuoso, the output will be a sdf/spice netlist file. second, the simulation tool (ADMS/nanosim etc.) will take the verilog netlist as well as sdf/spice netlist as input for the simulation. |
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