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[资料] Super FinSim v7.1.03 High Performance Verilog Logic Simulation

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发表于 2010-1-20 13:58:40 | 显示全部楼层 |阅读模式

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High Performance Verilog Logic Simulation


                               
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Super Fast Simulation
SuperFinsim is the best choice for large Verilog simulation capacity. Itoffers an excellent price/performance ratio and robust integration withthird party software.


Features :

  • Best choice for large farms for Verilog simulation
  • Supports the entire Verilog language, user defined primitives, specify blocks, system tasks and functions, PLI 1.0, VCD and SDF.
  • Supports compiled, interpreted, and any mixture of compiled and interpreted simulation
  • First mixed event and cycle driven simulator for Verilog
  • Smart partitioner analyzes the design and decides which areas can be simulated by the Enhanced Cycle Simulation (ECS) kernel
  • Ableto handle modules with path delays as well as some RTL-level modules,and fully supports Xs and Zs as well as the entire range of Verilogstrengths.
  • Supports all popular waveform display tools including Veritools' Undertow, Cadence's Signalscan
  • Rated the fastest Verilog simulator In the DA Solution Limited `96 benchmark
  • FinSim was rated the fastest PC-based Verilog simulator in the ASIC & EDA benchmark.
  • Super-FinSimruns on all popular platforms including Sun Solaris, HP UX, DEC Unix,DEC NT and PCs running Windows NT/2000, Windows 95/98/ME and Linux
  • Add-on components include code coverage and Verilog Analyzer
Download Appz + License ( 17.9 Mb ) :



http://rapidshare.de/files/22252337/Super_FinSim_v7.1.03.rar.html


File Password : www.devilived.com


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