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This data sheet describes Lexra’s LX4189 processor, a complete MIPS R3000-class processor subsystem
developed for ease of integration. (See Figure 1 on page 12.) The major subsystems are: the CPU core, Local
Memory Interfaces (LMI) and LBus Controller (LBC). The technology includes optional interfaces to
customer-defined Coprocessors (CI[1-3]) and optional customer extensions to the MIPS ISA (Custom
Engine). The local instruction memories and data memories may include fixed RAM and/or cache; the sizes
are configurable.
The LX4189 is an upgrade to the LX4180, adding a 6-stage pipeline, conditional move instructions, 8
additional vectored interrupts, and greater clock speed. |
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lx4189_1_9.pdf
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Lexra 4819 datasheet
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发表于 2009-9-14 12:14:15