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Vweb Corp. - PROPRIETARY
Application Note - PRELIMINARY
Application Note - DVB-ASI Version 0.3
page 8 May 12, 2004
CDI Timing
Figure 4 Compressed Data Input Timing
Note: CDI_VALID_ is from falling edge of CDI_CLK.
The ASI Chip
The external ASI chip is a Cypress CY7B9334 for receiving DVB-ASI (i.e., CDI) and a Cypress
CY7B9234 for sending DVB-ASI (i.e., CDO).
DVB-ASI is a serial transmission, very much like SDI, but for compressed data. The bit rate is 270
Mbps. The ASI chips are really just serial to parallel (and parallel to serial) converters. One receives
the 270 Mbps stream and converts it to 27 MHz parallel data, a clock, and an CD valid signal, which
we can input to the CDI port. The other chip takes the 8 bit, 27 MHz, CDO signals and serializes
them into the 270 MBs stream. The Win10 schematics shows the ASI chips and the wiring to the
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