About an Error when using VCS

InterNOK

Sorry,I can't use Chinese now for some reasons,so I have to use English.

Can anybody explain the following error information given by VCS when I use it to compile a  testbench?

"Cross-module reference resolution error"

I don't know what the info above means and  can not modify  my code.If you know ,please tell me in Chinese,hehe,thanks!

humann

Sorry,I can't use Chinese now for some reasons,so I have to use English.

Did you use any undefined module? Please check if there is any typo in your source code.

eddsos

信号路径错

TommyGG

我们自己翻译为：“交叉引用错误”
我以前也经常遇到这个错误，
一般很容易找到错误原因，
我的记忆中好像在调用Class的Task或Function时容易出现，
好像常常是参数引用的问题。
我想大概意思是：你说调用的Task或Function参数不对或是在这里根本无法调用。
如果可以最好给出具体错误的代码，以便分析。
对此记忆很模糊，仅供参考

xingflying

在用ｆｕｎｃｔｉｏｎ或者ｔａｓｋ的时候，ｖｃｓ没有找到对它的定义或申明，应该把它ｉｎｃｌｕｄｅ进来

yurenjie

急求解答啊！！！！