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[求助] 用AMS混仿时,无error却画不出图,求助大家帮我看看,附上仿真报告

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发表于 2024-4-14 11:56:42 | 显示全部楼层 |阅读模式
50资产
irun(64): 15.20-p001: (c) Copyright 1995-2016 Cadence Design Systems, Inc.
TOOL:        irun(64)        15.20-p001: Started on Apr 14, 2024 at 11:31:12 CST
irun
        -f irunArgs
                -UNBUFFERED
                -cdslib ./cds.lib
                -errormax 50
                -status
                -nowarn DLNOHV
                -nowarn DLCLAP
                -v93
                -incdir /home/IC/xhy/
                -ade
                -timescale 1ns/1ns
                -vtimescale 1ns/1ns
                -discipline logic
                -delay_mode None
                -novitalaccl
                -access r
                -noparamerr
                -amspartinfo ../psf/partition.info
                -rnm_partinfo
                -modelincdir /home/IC/xhy/
                ./spiceModels.scs
                ./amsControlSpectre.scs
                -input ./probe.tcl
                -run
                -exit
                -ncsimargs "+amsrawdir ../psf"
                -simcompatible_ams spectre
                -name xhy_sim.div8_7:config
                -amsconnrules ConnRules_18V_basic
                +define+CDS_SELECT_CRS
                +define+CONNRULES_18V_BASIC
                -allowredefinition
                -amsbind
                -top xhy_sim.div8_7:schematic
                -top cds_globals
                ./netlist.vams
                -f ./textInputs
                        -amscompilefile "file:/home/IC/xhy/div8_7/functional/verilog.v lib:xhy cell:div8_7 view:functional"
                        -makelib xhy_sim
                        -endlib
                ./cds_globals.vams
                -l ../psf/irun.log
file: /home/IC/xhy/div8_7/functional/verilog.v
ncvlog: *W,SPDUSD: Include directory /home/IC/xhy/ given but not used.
        Total errors/warnings found outside modules and primitives:
                errors: 0, warnings: 1
ncvlog: Memory Usage - 20.6M program + 29.1M data = 49.8M total
ncvlog: cpu Usage - 0.0s system + 0.0s user = 0.0s total (0.0s, 91.1% cpu)
                Caching library 'xhy_sim' ....... Done
                Caching library 'worklib' ....... Done
                Caching library 'xhy' ....... Done
        Elaborating the design hierarchy:
        Top level design units:
                div8_7
                cds_globals
        Discipline resolution Pass...
        Doing auto-insertion of connection elements...
        Connect Rules applied are:
                ConnRules_18V_basic
        Building instance overlay tables: .................... Done
        Building instance specific data structures.
        Loading native compiled code:     .................... Done
        Design hierarchy summary:
                                 Instances  Unique
                Modules:                 5      15
                Registers:               8      83
                Scalar wires:            5       -
                Vectored wires:          2       -
                Always blocks:           8      31
                Initial blocks:          2      15
                Cont. assignments:       2      17
                Interconnect:            4       -
                Simulation timescale:  1ps
        Writing initial simulation snapshot: xhy_sim.div8_7:config
ncelab: Memory Usage - 49.0M program + 53.0M data = 102.0M total (Peak 235.6M)
ncelab: CPU Usage - 0.1s system + 0.1s user = 0.2s total (0.2s, 100.0% cpu)
Loading snapshot xhy_sim.div8_7:config .................... Done
Simulating in AMS-SIE mode...
        Starting Analog simulation engine...
AMSD: Environment variable:
        SPECTRE_DEFAULTS = -E
AMSD: Using spectre solver with arguments: -E.

Cadence (R) virtuoso (R) Spectre (R) Circuit Simulator
Version 15.1.0.284.isr1 64bit -- 10 Dec 2015
Copyright (C) 1989-2015 Cadence Design Systems, Inc. All rights reserved
        worldwide. Cadence, Virtuoso and Spectre are registered trademarks of
        Cadence Design Systems, Inc. All others are the property of their
        respective holders.

Includes RSA BSAFE(R) Cryptographic or Security Protocol Software from RSA
        Security, Inc.

User: IC   Host: IC   HostID: 7F0100   PID: 116411
Memory  available: 247.9145 MB  physical: 3.9540 GB
Linux   : CentOS Linux release 7.7.1908 (Core)
CPU Type: Intel(R) Core(TM) i7-9750H CPU @ 2.60GHz
All processors running at 2592.0 MHz
        Socket: Processors
        0:       0,  1,  2,  3

System load averages (1min, 5min, 15min) : 15.5 %, 8.8 %, 6.0 %
This is a virtual machine


Analog Kernel using -ANALOGCONTROL  ./spiceModels.scs.
Reading file:  /home/IC/simulation/div8_7/ams/config/netlist/spiceModels.scs
Reading link:  /opt/eda/cadence/INCISIV152/tools
Reading file:
        /opt/eda/cadence/INCISIV152/tools.lnx86/affirma_ams/etc/connect_lib/E2L_0.vams
Opening directory spiceModels.ahdlSimDB/ (775)
Opening directory
        spiceModels.ahdlSimDB//2532_tools_affirma_ams_etc_connect_lib_E2L_0.vams.connectLib__E2L_0__module__0x10000001_behavioral.ahdlcmi/
        (775)
Opening directory
        spiceModels.ahdlSimDB//2532_tools_affirma_ams_etc_connect_lib_E2L_0.vams.connectLib__E2L_0__module__0x10000001_behavioral.ahdlcmi/Linux-64/
        (775)
Reading file:
        /home/IC/simulation/div8_7/ams/config/netlist/spiceModels.ahdlSimDB/2532_tools_affirma_ams_etc_connect_lib_E2L_0.vams.connectLib__E2L_0__module__0x10000001_behavioral.ahdlcmi/Linux-64/obj/optimize/5.0/libahdlcmi_connectLib__E2L_0__module__0x10000001_behavioral.so
Installed compiled interface for
        connectLib__E2L_0__module__0x10000001_behavioral.
Reading file:  /home/IC/simulation/div8_7/ams/config/netlist/netlist.vams
Reading file:  /home/IC/Tech/tsmc65/models/spectre/crn65gplus_2d5_lk_v1d0.scs
Reading file:  /home/IC/Tech/tsmc65/models/spectre/mosCAPrf_ahdl.va
Reading link:
        /opt/eda/cadence/INCISIV152/tools.lnx86/spectre/etc/ahdl/constants.h
Reading file:
        /opt/eda/cadence/INCISIV152/tools.lnx86/spectre/etc/ahdl/constants.vams
Reading link:
        /opt/eda/cadence/INCISIV152/tools.lnx86/spectre/etc/ahdl/discipline.h
Reading file:
        /opt/eda/cadence/INCISIV152/tools.lnx86/spectre/etc/ahdl/disciplines.vams
Reading file:  /home/IC/Tech/tsmc65/models/spectre/mosCap_ahdl.va
Reading file:
        /home/IC/simulation/div8_7/ams/config/netlist/amsControlSpectre.scs
Reading file:  /home/IC/simulation/div8_7/ams/config/netlist/.amsbind.scs
Reading file:
        /opt/eda/cadence/INCISIV152/tools.lnx86/spectre/etc/configs/spectre.cfg
Time for NDB Parsing: CPU = 822.631 ms, elapsed = 904.569 ms.
Time accumulated: CPU = 1.02138 s, elapsed = 904.592 ms.
Peak resident memory used = 126 Mbytes.

ncsim> source /opt/eda/cadence/INCISIV152/tools/inca/files/ncsimrc
ncsim>
ncsim> # This is the NC-SIM(R) probe command file
ncsim> # used in the AMS-ADE integration.
ncsim>
ncsim>
ncsim> #
ncsim> # Database settings
ncsim> #
ncsim> if { [info exists ::env(AMS_RESULTS_DIR) ] } { set AMS_RESULTS_DIR $env(AMS_RESULTS_DIR)} else {set AMS_RESULTS_DIR "../psf"}
../psf
ncsim> database -open ams_database -into ${AMS_RESULTS_DIR} -default
Created default SHM database ams_database
ncsim>
ncsim> #
ncsim> # Probe settings
ncsim> #
ncsim> probe -create -emptyok -database ams_database -flow -ports -index -depth all -noaicms {div8_7}
Created probe 1
ncsim>
ncsim> run

The CPU load for active processors is :
        Spectre  0 (14.0 %)      1 (12.2 %)      2 (87.4 %)      3 (26.3 %)
        Other   

Warning from spectre in `cds_globals', during circuit read-in.
    WARNING (SFE-2946):
        "/home/IC/simulation/div8_7/ams/config/netlist/cds_globals.vams" 18:
        `cds_globals': Parameter `t1' redefines parameter of same name defined
        at higher level. Local parameter value will be used.

Time for Elaboration: CPU = 154.201 ms, elapsed = 155.885 ms.
Time accumulated: CPU = 1.17576 s, elapsed = 1.06065 s.
Peak resident memory used = 152 Mbytes.

Time for EDB Visiting: CPU = 501 us, elapsed = 499.964 us.
Time accumulated: CPU = 1.17643 s, elapsed = 1.06132 s.
Peak resident memory used = 152 Mbytes.


Notice from spectre during topology check.
    Only one connection to node `0'.


Global user options:
      addflowsuffix = yes
        dotprobefmt = hier
               temp = 27
               tnom = 27
              scale = 1
             scalem = 1
             reltol = 0.001
            vabstol = 1e-06
            iabstol = 1e-12
               gmin = 1e-12
             rforce = 1
           maxnotes = 5
           maxwarns = 5
             digits = 5
             pivrel = 0.001
     checklimitdest = psf
             rawfmt = sst2
          useprobes = yes

Scoped user options:

Circuit inventory:
              nodes 6
             iprobe 3     
connectLib__E2L_0__module__0x10000001_behavioral 2     
            vsource 3     

Analysis and control statement inventory:
               info 4     
               tran 1     

Output statements:
             .probe 0     
           .measure 0     
               save 3     

Time for parsing: CPU = 3.557 ms, elapsed = 6.2418 ms.
Time accumulated: CPU = 1.18014 s, elapsed = 1.06771 s.
Peak resident memory used = 153 Mbytes.

~~~~~~~~~~~~~~~~~~~~~~
Pre-Simulation Summary
~~~~~~~~~~~~~~~~~~~~~~
~~~~~~~~~~~~~~~~~~~~~~

***********************************************
Transient Analysis `tran': time = (0 s -> 5 us)
***********************************************
DC simulation time: CPU = 1.527 ms, elapsed = 1.70302 ms.
Important parameter values:
    start = 0 s
    outputstart = 0 s
    stop = 5 us
    step = 5 ns
    maxstep = 50 ns
    ic = all
    useprevic = no
    skipdc = no
    reltol = 100e-06
    abstol(V) = 1 uV
    abstol(I) = 1 pA
    temp = 27 C
    tnom = 27 C
    tempeffects = all
    errpreset = conservative
    method = gear2only
    lteratio = 10
    relref = alllocal
    cmin = 0 F
    gmin = 1 pS


Output and IC/nodeset summary:
                 save   6       (current)

    tran: time = 126.4 ns    (2.53 %), step = 1.646 ns    (32.9 m%)
    tran: time = 376 ns      (7.52 %), step = 1.208 ns    (24.2 m%)
    tran: time = 626.4 ns    (12.5 %), step = 1.646 ns    (32.9 m%)
    tran: time = 876 ns      (17.5 %), step = 1.208 ns    (24.2 m%)
    tran: time = 1.126 us    (22.5 %), step = 1.646 ns    (32.9 m%)
    tran: time = 1.376 us    (27.5 %), step = 1.208 ns    (24.2 m%)
    tran: time = 1.626 us    (32.5 %), step = 1.646 ns    (32.9 m%)
    tran: time = 1.876 us    (37.5 %), step = 1.208 ns    (24.2 m%)
    tran: time = 2.126 us    (42.5 %), step = 1.646 ns    (32.9 m%)
    tran: time = 2.376 us    (47.5 %), step = 1.208 ns    (24.2 m%)
    tran: time = 2.626 us    (52.5 %), step = 1.646 ns    (32.9 m%)
    tran: time = 2.876 us    (57.5 %), step = 1.208 ns    (24.2 m%)
    tran: time = 3.126 us    (62.5 %), step = 1.646 ns    (32.9 m%)
    tran: time = 3.376 us    (67.5 %), step = 1.208 ns    (24.2 m%)
    tran: time = 3.626 us    (72.5 %), step = 1.646 ns    (32.9 m%)
    tran: time = 3.876 us    (77.5 %), step = 1.208 ns    (24.2 m%)
    tran: time = 4.126 us    (82.5 %), step = 1.646 ns    (32.9 m%)
    tran: time = 4.376 us    (87.5 %), step = 1.208 ns    (24.2 m%)
    tran: time = 4.626 us    (92.5 %), step = 1.646 ns    (32.9 m%)
    tran: time = 4.876 us    (97.5 %), step = 1.208 ns    (24.2 m%)

The analog simulator has reached stop time, please use `analog -stop <new stop time>' to extend the analog stop time.
Simulation stopped via transient analysis stoptime at time 5 US
Memory Usage - 35.7M program + 412.4M data = 448.1M total
CPU Usage - 0.3s system + 6.7s user = 7.0s total (98.7% cpu)
ncsim> exit
Number of accepted tran steps =             9570

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Post-Transient Simulation Summary
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   -   To further speed up simulation, consider
          add ++aps on command line
   -   Non-default settings that could significantly slow down simulation
          errpreset = conservative, default moderate
   -   Features that may significantly slowing down simulation
          iprobe = 50.00 % of total equations
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~


During simulation, the CPU load for active processors is :
        Spectre  0 (26.4 %)      1 (28.4 %)      2 (46.7 %)      3 (27.8 %)
        Other   
Initial condition solution time: CPU = 1.601 ms, elapsed = 1.79601 ms.

**** AMSD: Mixed-Signal Activity Statistics ****
Number of A-to-D events:                     872
  Number of A-to-D events in IEs:            872
Number of D-to-A events:                       0
  Number of D-to-A events in IEs:              0
Number of VHDL-AMS Breaks:                     0

Intrinsic tran analysis time:    CPU = 5.90611 s, elapsed = 5.91201 s.
Total time required for tran analysis `tran': CPU = 5.90954 s, elapsed =
        5.91627 s.
Time accumulated: CPU = 7.09402 s, elapsed = 6.9891 s.
Peak resident memory used = 160 Mbytes.

finalTimeOP: writing operating point information to rawfile.

Opening the PSF file ../psf/finalTimeOP.info ...
modelParameter: writing model parameter values to rawfile.

Opening the PSF file ../psf/modelParameter.info ...
element: writing instance parameter values to rawfile.

Opening the PSF file ../psf/element.info ...
outputParameter: writing output parameter values to rawfile.

Opening the PSF file ../psf/outputParameter.info ...
ncsim: Memory Usage - 35.7M program + 412.3M data = 448.0M total (448.1M Peak)
ncsim: CPU Usage - 0.3s system + 6.9s user = 7.2s total (7.2s, 99.7% cpu)
TOOL:        irun(64)        15.20-p001: Exiting on Apr 14, 2024 at 11:31:36 CST  (total: 00:00:24)


发表于 2024-4-15 11:09:21 | 显示全部楼层
可能是仿真结果无法刷新。可以重启软件试试看。
发表于 2024-4-15 20:26:21 | 显示全部楼层
我也遇到过这种问题,求解决方法
发表于 2024-4-15 20:35:26 | 显示全部楼层
先用viva加载下仿真结果看看
 楼主| 发表于 2024-4-18 17:14:08 | 显示全部楼层


zxkl317408 发表于 2024-4-15 20:26
我也遇到过这种问题,求解决方法



仿真的时候将techLib改变一下,就出来了。解决方法是有了,但我不知道


2.png
1.png
 楼主| 发表于 2024-4-18 17:14:58 | 显示全部楼层


吾心归处 发表于 2024-4-18 17:14
仿真的时候将techLib改变一下,就出来了。解决方法是有了,但我不知道


但是我不知道原因,供你参考一下。
 楼主| 发表于 2024-4-18 17:15:51 | 显示全部楼层


六山小子 发表于 2024-4-15 20:35
先用viva加载下仿真结果看看


我没用过这个软件
 楼主| 发表于 2024-4-18 17:17:23 | 显示全部楼层


tabooes 发表于 2024-4-15 11:09
可能是仿真结果无法刷新。可以重启软件试试看。


这个我试过了,不行
发表于 2024-4-18 17:20:09 | 显示全部楼层


吾心归处 发表于 2024-4-18 17:15
我没用过这个软件


这个就是virtuoso下的工具, 只要你安装了virtuoso, 直接执行viva命令就可以了
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