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[转贴] ICC II 与 Innovus 的比较

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发表于 2019-4-23 23:04:16 | 显示全部楼层 |阅读模式

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本帖最后由 yyqg 于 2019-4-23 23:06 编辑

贴自国外网站:

We are currently using Innovus for production work at a 7 nm process     node.  Here is my feedback.

Performance - Innovus vs. IC Compiler II

- Overall, for the same timing results, we've been getting a 2X          runtime performance speed up with Innovus over ICC2.

- Our largest blocks have ~2 million instances.

- We use Cadence's multi-threading -- we use 8 cores for most of           our design work, and 16 cores for our larger blocks.  In the           future we will look at using Cadence's multi-distribution           capabilities.  But right now we can't speak to it.

Timing - Primetime + Tempus

Innovus' timing results have met our overall needs.  We use Primetime     for our signoff environment; we've found there is a good correlation     between Innovus and Primetime.  Also impressive is the ability to SPICE    a path when using Tempus.  Seeing the timing reports with Tempus and     SPICE timing results interleaved makes finding the outliers very easy.

Synopsys Design Compiler compatibility

- We compared DC + ICC2 with DC + Innovus.  The PPA is similar but Innovus is faster.

- Innovus can read the DC verilog netlist and SDC constrAInts (which are industry standard formats.)
  - Someday we hope to test Genus RTL synth + Innovus to see the impact of the tighter integration.  For now, just folding    Innovus into our flow is a big enough step for us.  So, we  are sticking to Innovus with Synopsys Design Compiler.
  DRC - Calibre with Innovus vs. ICC2
    We use Calibre for DRC signoff, and there is some integration of Calibre
back into the Cadence GUI.  One of the things I've been impressed with
    for Cadence is that the DRC violations for our blocks is always lower     with Innovus vs ICC2.  This better DRC result is compelling as it will
    reduce our ECO iterations -- not all iterations are timing-based.    Power - Innovus vs. ICC2
We see similar results, with a small edge to Cadence on clock power.
Utilization   Innovus utilization numbers are within 2% percent of the ICC2 results.

GigaPlace global routing

We are using Innovus' GigaPlace as part of our flow.  GigaPlace does the    first initial global placement, which is an especially important first     step for 7nm implementations.  If the global placement is bad, it's     game over.  
    Things are extremely sensitive at 7nm, e.g. moving large cells later     in the flow can cause quite a bit of disturbance which can be hard to     recover from, so getting the initial global placement to honor all the     7nm timing requirements will go a long way to avoiding these bumps.    Overall we see good correlation of TNS as the Innovus flow proceeds.
CDNS Project Virtus - IR-Aware Placement  
    There are many areas of voltage drop in a power grid that can impact
performance.  Innovus can strengthen power grid or move cells out
    without impacting your grid.  It ensures that routing tracks are     available and that your performance is not degraded.






大家有没有同时用过这两款工具的,可以讨论讨论各自优缺点。。


发表于 2019-4-24 09:26:05 | 显示全部楼层
deechip的网站? INNOVUS 确实要比ICC2 好用不少。 举个栗子, 苹果采用的是INNOVUS
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 楼主| 发表于 2019-4-24 10:04:36 来自手机 | 显示全部楼层


   
固执的寻觅 发表于 2019-4-24 09:26
deechip的网站? INNOVUS 确实要比ICC2 好用不少。 举个栗子, 苹果采用的是INNOVUS ...


是的,不过不是很久前那个帖子了,是最近新发的一个贴
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发表于 2019-4-25 16:56:53 | 显示全部楼层
去年的一个案例,16nm 工艺,1.5million instance,相同的Floorplan,ICC2在place阶段就卡住了,congestion非常严重;换成innovus 轻松跑完route没有任何congestion问题,后来听说ICC2增加了feature来解决这种hign congestion design的问题。
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发表于 2019-4-25 17:50:17 | 显示全部楼层
传言今年新版的INNOVUS会引入AI 。步子比S家快了一步,拭目以待
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发表于 2019-5-4 21:28:35 | 显示全部楼层
期待。。超越期待
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发表于 2019-5-5 10:36:40 | 显示全部楼层
先进工艺C占优势,个人感觉40及以上的都差不多,S更多一点,40的同一个项目,分别跑,PR的最终结果相似
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发表于 2019-5-6 18:46:06 | 显示全部楼层
14nm以下节点innovas主流了
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