矽谷晶量半导体（杭州）有限公司招聘模拟IC及layout工程师

yudgern

矽谷晶量半导体（杭州）有限公司为美国INITIO 杭州分公司，成立于2008年。公司主要从事集成电路产品的设计与技术支持，在信息存储控制芯片的研发方面具有较强的实力。目前产品包括USB to SATA 桥接芯片，NAND Flash 控制芯片和硬盘控制芯片等。西部数据，希捷，Wintec和宇瞻等均为公司长期合作客户与伙伴。晶量一直在努力地为客户提供更为完整的传输接口解决方案的同时，提高全球市场占有率。
晶量的精彩期待您的参与！

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The INITIO is built on a foundation ofinnovation and excellence and we are always looking for great people to workwith us.

INITIO is a leadingprovider of quality cost-effective integrated circuits and solutions forstorage devices.Established in 1994 in Silicon Valley, INITIO has been at theforefront of providing complete semiconductor solution for data storage andretrieval.Starting from SCSI, IDE, to FireWire, USB, SATA and e-SATA, we haveunparallel knowledge and expertise in making the best and newest storagesolution easy to use for end users. We are a semiconductor company within-house know-how to provide complete solution and support to our OEM customers- from IC, software, firmware, driver, utilities, reference design kit, anddebugging boards, to custom design of customer's products and on-sitemanufacturing support, we make sure our customers can go to market with thebest products in the shortest time.

Our product designphilosophy is simple: we make leading edge technology affordable, adaptable,and reliable to all users, from expert IT professionals to beginners. Our goalis to make data access a trivial task, and to make our products transparent tousers.

INITIO 's IC are developed internally,allowing for creative, less rigid ASIC solutions and more cost efficientdevelopment cycles.

Our comprehensive technical support means that we alwayshave an engineer on premise to serve our customer's needs and our patentedin-house technology cores allow for integration from one generation of chip toanother.

INITIO, we bridge the technical challenge to bring youreliable and easy-to-use storage solution.

  

Analog and Mixed signal Design Engineer

模拟集成电路设计工程师

JobResponsibilities
- Participate in circuit architecture, circuit implementation, design review,layout supervision, and silicon validation.

Qualification:
- MSEE or BS with 3+ years of industrial experience.
- Design knowledge in any of the following areas is required: PLL, CDR, Linedriver/Receiver, High speed IO.
- Candidates must be self-motivated, hardworking, with good communication anddocumentation skills.
- Solid knowledge of EDA design tools. Cadence design environment is preferred.
- Experience in VerilogA and/or Matlab is a plus.
- Knowledge in signal processing and communication theories is a plus.

Layout Design Engineer

版图设计工程师

Requirements:

1.
A BS inEE, or equivalent experience

2.
  2+ years provenrecent experience in sub micro layout design

3.
Clearunderstanding of hierarchical layout methodology and requirements

4.
Goodspoken communication skills (Chinese +English)

5.
Experiencewith Virtuoso, and Calibre or Assura.

6.
Skills in PR is a plus

Responsibilities:

1.
Layoutdesign of high speed analog CMOS circuits and logic blocs

2.
Chiplevel integration and verification.

3.
Understandthe critical requirements of analog design.

4.
More than2 years experience in CMOS analogy/mixed signal/layout design

简历直接投递：hr_hz@initio.com.tw

公司网址：www.initio.com
　　联系人：朱小姐
　　联系电话：0571-87756308-109
　
公司地址：杭州市滨江区滨盛路1505号银丰大厦6楼602室

edwardk

学习中。。。。

老公

回复 2# edwardk


   艹倪码的，学习你嘛个碧啊   你咋个不学习 你八艹尼玛呀

edwardk

学习中。。。。。

edwardk

学习中。。。。。

老公

回复 5# edwardk


   你再T，M挖坟，你就会让你自己 短子爵孙

edwardk

回复 6# 老公


     你咋对矽谷晶量半导体（杭州）有限公司招聘模拟IC及layout工程师有兴趣？？？哈哈！！！